drm/i915/icl: Wa_2006665173

Disable blend embellishment in RCC.

Also, some other registers style fixed in passing.

v2: Rebased on top of the WA refactoring
v3: Added References (Mika)
v4:
  - Fixed in B0
  - Mentioned style fixes in commit message

References: HSDES#2006665173
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1527285939-20113-4-git-send-email-oscar.mateo@intel.com

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 924b9a6b1cd0def4eab30d4de84bdaa05abc44c9..6e88c6bf3911be59c89809e3dec5d0ea6310cb6b 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7211,13 +7211,17 @@ enum {
 
 /* GEN7 chicken */
 #define GEN7_COMMON_SLICE_CHICKEN1             _MMIO(0x7010)
-# define GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC     ((1<<10) | (1<<26))
-# define GEN9_RHWO_OPTIMIZATION_DISABLE                (1<<14)
-#define COMMON_SLICE_CHICKEN2                  _MMIO(0x7014)
-# define GEN9_PBE_COMPRESSED_HASH_SELECTION    (1<<13)
-# define GEN9_DISABLE_GATHER_AT_SET_SHADER_COMMON_SLICE (1<<12)
-# define GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION (1<<8)
-# define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE  (1<<0)
+  #define GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC    ((1 << 10) | (1 << 26))
+  #define GEN9_RHWO_OPTIMIZATION_DISABLE       (1 << 14)
+
+#define COMMON_SLICE_CHICKEN2                                  _MMIO(0x7014)
+  #define GEN9_PBE_COMPRESSED_HASH_SELECTION                   (1 << 13)
+  #define GEN9_DISABLE_GATHER_AT_SET_SHADER_COMMON_SLICE       (1 << 12)
+  #define GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION             (1 << 8)
+  #define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE                 (1 << 0)
+
+#define GEN11_COMMON_SLICE_CHICKEN3            _MMIO(0x7304)
+  #define GEN11_BLEND_EMB_FIX_DISABLE_IN_RCC   (1 << 11)
 
 #define HIZ_CHICKEN                                    _MMIO(0x7018)
 # define CHV_HZ_8X8_MODE_IN_1X                         (1<<15)

diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
index 1d298035b1d247ada8aa1bc2c76b7a64dd707121..33a1a0cd2a8431429ef8de64d0501cd9604e8d3e 100644 (file)
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -474,6 +474,11 @@ static int icl_ctx_workarounds_init(struct drm_i915_private *dev_priv)
        WA_SET_BIT_MASKED(GEN9_SLICE_COMMON_ECO_CHICKEN1,
                          GEN11_STATE_CACHE_REDIRECT_TO_CS);
 
+       /* Wa_2006665173:icl (pre-prod) */
+       if (IS_ICL_REVID(dev_priv, ICL_REVID_A0, ICL_REVID_A0))
+               WA_SET_BIT_MASKED(GEN11_COMMON_SLICE_CHICKEN3,
+                                 GEN11_BLEND_EMB_FIX_DISABLE_IN_RCC);
+
        return 0;
 }