struct csid_device *csid = v4l2_get_subdevdata(sd);
struct camss *camss = csid->camss;
struct device *dev = camss->dev;
- struct vfe_device *vfe = &camss->vfe[csid->id];
int ret = 0;
if (on) {
* switching on the CSID. Do so unconditionally, as there is no
* drawback in following the same powering order on older SoCs.
*/
- ret = vfe_get(vfe);
+ ret = csid->res->parent_dev_ops->get(camss, csid->id);
if (ret < 0)
return ret;
regulator_bulk_disable(csid->num_supplies,
csid->supplies);
pm_runtime_put_sync(dev);
- vfe_put(vfe);
+ csid->res->parent_dev_ops->put(camss, csid->id);
}
return ret;
csid->id = id;
csid->res = &res->csid;
+ if (dev_WARN_ONCE(dev, !csid->res->parent_dev_ops,
+ "Error: CSID depends on VFE/IFE device ops!\n")) {
+ return -EINVAL;
+ }
+
csid->res->hw_ops->subdev_init(csid);
/* Memory */
* VFE to be initialized before CSID
*/
if (id >= 2) /* VFE/CSID lite */
- csid->base = camss->vfe[id].base + VFE_480_LITE_CSID_OFFSET;
+ csid->base = csid->res->parent_dev_ops->get_base_address(camss, id)
+ + VFE_480_LITE_CSID_OFFSET;
else
- csid->base = camss->vfe[id].base + VFE_480_CSID_OFFSET;
+ csid->base = csid->res->parent_dev_ops->get_base_address(camss, id)
+ + VFE_480_CSID_OFFSET;
} else {
csid->base = devm_platform_ioremap_resource_byname(pdev, res->reg[0]);
if (IS_ERR(csid->base))
#define CAMSS_CLOCK_MARGIN_NUMERATOR 105
#define CAMSS_CLOCK_MARGIN_DENOMINATOR 100
+static const struct parent_dev_ops vfe_parent_dev_ops;
+
static const struct camss_subdev_resources csiphy_res_8x16[] = {
/* CSIPHY0 */
{
.interrupt = { "csid0" },
.csid = {
.hw_ops = &csid_ops_4_1,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_4_1
}
},
.interrupt = { "csid1" },
.csid = {
.hw_ops = &csid_ops_4_1,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_4_1
}
},
.interrupt = { "csid0" },
.csid = {
.hw_ops = &csid_ops_4_7,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_4_7
}
},
.interrupt = { "csid1" },
.csid = {
.hw_ops = &csid_ops_4_7,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_4_7
}
},
.interrupt = { "csid2" },
.csid = {
.hw_ops = &csid_ops_4_7,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_4_7
}
},
.interrupt = { "csid3" },
.csid = {
.hw_ops = &csid_ops_4_7,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_4_7
}
}
.interrupt = { "csid0" },
.csid = {
.hw_ops = &csid_ops_4_7,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_4_7
}
},
.interrupt = { "csid1" },
.csid = {
.hw_ops = &csid_ops_4_7,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_4_7
}
},
.interrupt = { "csid2" },
.csid = {
.hw_ops = &csid_ops_4_7,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_4_7
}
},
.interrupt = { "csid3" },
.csid = {
.hw_ops = &csid_ops_4_7,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_4_7
}
}
.interrupt = { "csid0" },
.csid = {
.hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_gen2
}
},
.interrupt = { "csid1" },
.csid = {
.hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_gen2
}
},
.csid = {
.is_lite = true,
.hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_gen2
}
}
.interrupt = { "csid0" },
.csid = {
.hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_gen2
}
},
.interrupt = { "csid1" },
.csid = {
.hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_gen2
}
},
.csid = {
.is_lite = true,
.hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_gen2
}
},
.csid = {
.is_lite = true,
.hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_gen2
}
}
.interrupt = { "csid0" },
.csid = {
.hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_gen2
}
},
.interrupt = { "csid1" },
.csid = {
.hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_gen2
}
},
.interrupt = { "csid2" },
.csid = {
.hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_gen2
}
},
.interrupt = { "csid3" },
.csid = {
.hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_gen2
}
},
.csid = {
.is_lite = true,
.hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_gen2
}
},
.csid = {
.is_lite = true,
.hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_gen2
}
},
.csid = {
.is_lite = true,
.hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_gen2
}
},
.csid = {
.is_lite = true,
.hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
.formats = &csid_formats_gen2
}
}
}
}
+static int vfe_parent_dev_ops_get(struct camss *camss, int id)
+{
+ int ret = -EINVAL;
+
+ if (id < camss->res->vfe_num) {
+ struct vfe_device *vfe = &camss->vfe[id];
+
+ ret = vfe_get(vfe);
+ }
+
+ return ret;
+}
+
+static int vfe_parent_dev_ops_put(struct camss *camss, int id)
+{
+ if (id < camss->res->vfe_num) {
+ struct vfe_device *vfe = &camss->vfe[id];
+
+ vfe_put(vfe);
+ }
+
+ return 0;
+}
+
+static void __iomem
+*vfe_parent_dev_ops_get_base_address(struct camss *camss, int id)
+{
+ if (id < camss->res->vfe_num) {
+ struct vfe_device *vfe = &camss->vfe[id];
+
+ return vfe->base;
+ }
+
+ return NULL;
+}
+
+static const struct parent_dev_ops vfe_parent_dev_ops = {
+ .get = vfe_parent_dev_ops_get,
+ .put = vfe_parent_dev_ops_put,
+ .get_base_address = vfe_parent_dev_ops_get_base_address
+};
+
/*
* camss_of_parse_endpoint_node - Parse port endpoint node
* @dev: Device