drm/etnaviv: disable MLCG and pulse eater on GPU reset
authorLucas Stach <l.stach@pengutronix.de>
Wed, 7 Jun 2023 12:58:41 +0000 (14:58 +0200)
committerLucas Stach <l.stach@pengutronix.de>
Tue, 23 Jan 2024 09:20:20 +0000 (10:20 +0100)
Module level clock gating and the pulse eater might interfere with
the GPU reset, as they both have the potential to stop the clock
and thus reset propagation to parts of the GPU.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
drivers/gpu/drm/etnaviv/etnaviv_gpu.c

index 9276756e1397d37effffaf4dfe84dc940748a6e4..1dcfa23db3be441b414a9650ecb8d6c74bfc0096 100644 (file)
@@ -513,8 +513,19 @@ static int etnaviv_hw_reset(struct etnaviv_gpu *gpu)
        timeout = jiffies + msecs_to_jiffies(1000);
 
        while (time_is_after_jiffies(timeout)) {
-               /* enable clock */
                unsigned int fscale = 1 << (6 - gpu->freq_scale);
+               u32 pulse_eater = 0x01590880;
+
+               /* disable clock gating */
+               gpu_write_power(gpu, VIVS_PM_POWER_CONTROLS, 0x0);
+
+               /* disable pulse eater */
+               pulse_eater |= BIT(17);
+               gpu_write_power(gpu, VIVS_PM_PULSE_EATER, pulse_eater);
+               pulse_eater |= BIT(0);
+               gpu_write_power(gpu, VIVS_PM_PULSE_EATER, pulse_eater);
+
+               /* enable clock */
                control = VIVS_HI_CLOCK_CONTROL_FSCALE_VAL(fscale);
                etnaviv_gpu_load_clock(gpu, control);