arm64: dts: colibri-imx8x: Add iris carrier board
authorPhilippe Schenker <philippe.schenker@toradex.com>
Tue, 14 Mar 2023 10:24:08 +0000 (11:24 +0100)
committerShawn Guo <shawnguo@kernel.org>
Mon, 27 Mar 2023 02:10:49 +0000 (10:10 +0800)
Add the Toradex Iris Carrier Board for Colibri iMX8X, small form-factor
production ready board.

Additional details available at:
https://www.toradex.com/products/carrier-boards/iris-carrier-board

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/Makefile
arch/arm64/boot/dts/freescale/imx8qxp-colibri-iris.dts [new file with mode: 0644]
arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi [new file with mode: 0644]

index 9f49e47589ab763e4dbe10cb4184a9c858733bca..48bb0fe4a6165539ea56d52de88f4a341f6e8542 100644 (file)
@@ -131,6 +131,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qm-mek.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-aster.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-iris.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx93-11x11-evk.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-iris.dts b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-iris.dts
new file mode 100644 (file)
index 0000000..fed75b5
--- /dev/null
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2018-2021 Toradex
+ */
+
+/dts-v1/;
+
+#include "imx8qxp-colibri.dtsi"
+#include "imx8x-colibri-iris.dtsi"
+
+/ {
+       model = "Toradex Colibri iMX8QXP on Colibri Iris Board";
+       compatible = "toradex,colibri-imx8x-iris",
+                    "toradex,colibri-imx8x",
+                    "fsl,imx8qxp";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi
new file mode 100644 (file)
index 0000000..5f30c88
--- /dev/null
@@ -0,0 +1,115 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2018-2021 Toradex
+ */
+
+/ {
+       aliases {
+               rtc0 = &rtc_i2c;
+               rtc1 = &rtc;
+       };
+
+       reg_3v3: regulator-3v3 {
+               compatible = "regulator-fixed";
+               regulator-max-microvolt = <3300000>;
+               regulator-min-microvolt = <3300000>;
+               regulator-name = "3.3V";
+       };
+};
+
+&colibri_gpio_keys {
+       status = "okay";
+};
+
+/* Colibri FastEthernet */
+&fec1 {
+       status = "okay";
+};
+
+/* Colibri I2C */
+&i2c1 {
+       status = "okay";
+
+       /* M41T0M6 real time clock on carrier board */
+       rtc_i2c: rtc@68 {
+               compatible = "st,m41t0";
+               reg = <0x68>;
+       };
+};
+
+&iomuxc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_gpio_iris>;
+
+       pinctrl_gpio_iris: gpioirisgrp {
+               fsl,pins = <IMX8QXP_QSPI0B_DATA3_LSIO_GPIO3_IO21        0x20>,          /* SODIMM  98 */
+                          <IMX8QXP_USB_SS3_TC1_LSIO_GPIO4_IO04         0x20>,          /* SODIMM 133 */
+                          <IMX8QXP_SAI0_TXD_LSIO_GPIO0_IO25            0x20>,          /* SODIMM 103 */
+                          <IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28           0x20>,          /* SODIMM 101 */
+                          <IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27            0x20>,          /* SODIMM  97 */
+                          <IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03     0x06000020>,    /* SODIMM  85 */
+                          <IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26            0x20>,          /* SODIMM  79 */
+                          <IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10        0x06700041>;    /* SODIMM  45 */
+       };
+
+       pinctrl_uart1_forceoff: uart1forceoffgrp {
+               fsl,pins = <IMX8QXP_QSPI0A_SS0_B_LSIO_GPIO3_IO14        0x20>;  /* SODIMM 22 */
+       };
+
+       pinctrl_uart23_forceoff: uart23forceoffgrp {
+               fsl,pins = <IMX8QXP_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00  0x20>; /* SODIMM 23 */
+       };
+};
+
+/* Colibri SPI */
+&lpspi2 {
+       status = "okay";
+};
+
+/* Colibri UART_B */
+&lpuart0 {
+       status = "okay";
+};
+
+/* Colibri UART_C */
+&lpuart2 {
+       status = "okay";
+};
+
+/* Colibri UART_A */
+&lpuart3 {
+       status= "okay";
+};
+
+&lsio_gpio3 {
+       /*
+        * This turns the LVDS transceiver on. If one wants to turn the
+        * transceiver off, that property has to be deleted and the gpio handled
+        * in userspace.
+        */
+       lvds-tx-on-hog {
+               gpio-hog;
+               gpios = <18 0>;
+               output-high;
+       };
+};
+
+/* Colibri PWM_B */
+&lsio_pwm0 {
+       status = "okay";
+};
+
+/* Colibri PWM_C */
+&lsio_pwm1 {
+       status = "okay";
+};
+
+/* Colibri PWM_D */
+&lsio_pwm2 {
+       status = "okay";
+};
+
+/* Colibri SD/MMC Card */
+&usdhc2 {
+       status = "okay";
+};