S: Supported
F: drivers/net/ethernet/cavium/thunder/
+ARM/CIRRUS LOGIC BK3 MACHINE SUPPORT
+M: Lukasz Majewski <lukma@denx.de>
+L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+S: Maintained
+F: arch/arm/mach-ep93xx/ts72xx.c
+
ARM/CIRRUS LOGIC CLPS711X ARM ARCHITECTURE
M: Alexander Shiyan <shc_work@mail.ru>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
M: Michael Petchkovsky <mkpetch@internode.on.net>
S: Maintained
-ARM/NOMADIK ARCHITECTURE
-M: Alessandro Rubini <rubini@unipv.it>
+ARM/NOMADIK/U300/Ux500 ARCHITECTURES
M: Linus Walleij <linus.walleij@linaro.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-nomadik/
-F: drivers/pinctrl/nomadik/
+F: arch/arm/mach-u300/
+F: arch/arm/mach-ux500/
+F: arch/arm/boot/dts/ste-*
+F: drivers/clk/clk-nomadik.c
+F: drivers/clk/clk-u300.c
+F: drivers/clocksource/clksrc-dbx500-prcmu.c
+F: drivers/clocksource/timer-u300.c
+F: drivers/dma/coh901318*
+F: drivers/dma/ste_dma40*
+F: drivers/hwspinlock/u8500_hsem.c
F: drivers/i2c/busses/i2c-nomadik.c
+F: drivers/i2c/busses/i2c-stu300.c
+F: drivers/mfd/ab3100*
+F: drivers/mfd/ab8500*
+F: drivers/mfd/abx500*
+F: drivers/mfd/dbx500*
+F: drivers/mfd/db8500*
+F: drivers/pinctrl/nomadik/
+F: drivers/pinctrl/pinctrl-coh901*
+F: drivers/pinctrl/pinctrl-u300.c
+F: drivers/rtc/rtc-ab3100.c
+F: drivers/rtc/rtc-ab8500.c
+F: drivers/rtc/rtc-coh901331.c
+F: drivers/rtc/rtc-pl031.c
+F: drivers/watchdog/coh901327_wdt.c
+F: Documentation/devicetree/bindings/arm/ste-*
+F: Documentation/devicetree/bindings/arm/ux500/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik.git
ARM/NUVOTON W90X900 ARM ARCHITECTURE
F: drivers/clocksource/armv7m_systick.c
ARM/TANGO ARCHITECTURE
-M: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
+M: Marc Gonzalez <marc.w.gonzalez@free.fr>
+M: Mans Rullgard <mans@mansr.com>
L: linux-arm-kernel@lists.infradead.org
-S: Maintained
+S: Odd Fixes
N: tango
ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT
M: Dirk Opfer <dirk@opfer-online.de>
S: Maintained
-ARM/U300 MACHINE SUPPORT
-M: Linus Walleij <linus.walleij@linaro.org>
-L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
-S: Supported
-F: arch/arm/mach-u300/
-F: drivers/clocksource/timer-u300.c
-F: drivers/i2c/busses/i2c-stu300.c
-F: drivers/rtc/rtc-coh901331.c
-F: drivers/watchdog/coh901327_wdt.c
-F: drivers/dma/coh901318*
-F: drivers/mfd/ab3100*
-F: drivers/rtc/rtc-ab3100.c
-F: drivers/rtc/rtc-coh901331.c
-T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson.git
-
ARM/UNIPHIER ARCHITECTURE
M: Masahiro Yamada <yamada.masahiro@socionext.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
F: drivers/tty/serial/8250/8250_uniphier.c
N: uniphier
-ARM/Ux500 ARM ARCHITECTURE
-M: Linus Walleij <linus.walleij@linaro.org>
-L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
-S: Maintained
-F: arch/arm/mach-ux500/
-F: drivers/clocksource/clksrc-dbx500-prcmu.c
-F: drivers/dma/ste_dma40*
-F: drivers/hwspinlock/u8500_hsem.c
-F: drivers/mfd/abx500*
-F: drivers/mfd/ab8500*
-F: drivers/mfd/dbx500*
-F: drivers/mfd/db8500*
-F: drivers/pinctrl/nomadik/pinctrl-ab*
-F: drivers/pinctrl/nomadik/pinctrl-nomadik*
-F: drivers/rtc/rtc-ab8500.c
-F: drivers/rtc/rtc-pl031.c
-T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson.git
-
ARM/Ux500 CLOCK FRAMEWORK SUPPORT
M: Ulf Hansson <ulf.hansson@linaro.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
CONFIG_PPP_DEFLATE=m
CONFIG_PPP_ASYNC=m
CONFIG_PPP_SYNC_TTY=m
+CONFIG_USB_USBNET=m
CONFIG_INPUT_EVDEV=m
CONFIG_INPUT_EVBUG=m
CONFIG_KEYBOARD_ATKBD=m
CONFIG_HIGH_RES_TIMERS=y
CONFIG_CGROUPS=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_PERF_EVENTS=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_REGULATOR_WM8994=y
CONFIG_MEDIA_SUPPORT=m
CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_MEDIA_CEC_SUPPORT=y
CONFIG_MEDIA_CONTROLLER=y
CONFIG_VIDEO_V4L2_SUBDEV_API=y
CONFIG_MEDIA_USB_SUPPORT=y
CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=m
CONFIG_V4L_TEST_DRIVERS=y
CONFIG_VIDEO_VIVID=m
+CONFIG_CEC_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_SAMSUNG_S5P_CEC=m
CONFIG_DRM=y
CONFIG_DRM_EXYNOS=y
CONFIG_DRM_EXYNOS_FIMD=y
CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=y
CONFIG_DRM_NXP_PTN3460=y
CONFIG_DRM_PARADE_PS8622=y
+CONFIG_DRM_SII9234=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_LCD_PLATFORM=y
CONFIG_BACKLIGHT_PWM=y
CONFIG_SND_SOC_SAMSUNG_SMDK_WM8994=y
CONFIG_SND_SOC_SMDK_WM8994_PCM=y
CONFIG_SND_SOC_SNOW=y
+CONFIG_SND_SOC_ODROID=y
CONFIG_SND_SIMPLE_CARD=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_DEVFREQ_GOV_USERSPACE=y
CONFIG_ARM_EXYNOS_BUS_DEVFREQ=y
CONFIG_DEVFREQ_EVENT_EXYNOS_NOCP=y
+CONFIG_EXYNOS_IOMMU=y
CONFIG_EXTCON=y
CONFIG_EXTCON_MAX14577=y
CONFIG_EXTCON_MAX77693=y
CONFIG_CMDLINE="noinitrd console=ttymxc0,115200"
CONFIG_KEXEC=y
CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CAN_FLEXCAN=y
CONFIG_BT=y
CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_SERDEV=y
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART_LL=y
CONFIG_CFG80211=y
CONFIG_USB_NET_CDC_EEM=m
CONFIG_BRCMFMAC=m
CONFIG_WL12XX=m
+CONFIG_WL18XX=m
CONFIG_WLCORE_SDIO=m
# CONFIG_WILINK_PLATFORM_DATA is not set
CONFIG_INPUT_EVDEV=y
CONFIG_SERIAL_IMX_CONSOLE=y
CONFIG_SERIAL_FSL_LPUART=y
CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
+CONFIG_SERIAL_DEV_BUS=y
+CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
# CONFIG_I2C_COMPAT is not set
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MUX=y
CONFIG_SOC_CAMERA_OV2640=y
CONFIG_IMX_IPUV3_CORE=y
CONFIG_DRM=y
+CONFIG_DRM_PANEL_LVDS=y
CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_DRM_DW_HDMI_AHB_AUDIO=m
CONFIG_DRM_DW_HDMI_CEC=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_INTF_DEV_UIE_EMUL=y
CONFIG_RTC_DRV_DS1307=y
CONFIG_RTC_DRV_M41T80=y
CONFIG_RTC_DRV_MC13XXX=y
CONFIG_RTC_DRV_MXC=y
+CONFIG_RTC_DRV_MXC_V2=y
CONFIG_RTC_DRV_SNVS=y
CONFIG_DMADEVICES=y
CONFIG_FSL_EDMA=y
CONFIG_CRYPTO_ANSI_CPRNG=y
CONFIG_CRYPTO_USER_API_HASH=y
CONFIG_CRYPTO_USER_API_SKCIPHER=y
+CONFIG_SPI_CADENCE_QUADSPI=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_EVDEV=m
+CONFIG_INPUT_GPIO_DECODER=m
+CONFIG_GPIO_PCA953X=m
+CONFIG_LEDS_TRIGGER_ACTIVITY=y
+CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_TRUSTED_FOUNDATIONS=y
CONFIG_PCI=y
CONFIG_PCI_HOST_GENERIC=y
+CONFIG_PCI_DRA7XX=y
+CONFIG_PCI_DRA7XX_EP=y
CONFIG_PCI_KEYSTONE=y
CONFIG_PCI_MSI=y
CONFIG_PCI_MVEBU=y
CONFIG_PCI_RCAR_GEN2=y
CONFIG_PCIE_RCAR=y
CONFIG_PCIEPORTBUS=y
+CONFIG_PCI_ENDPOINT=y
+CONFIG_PCI_ENDPOINT_CONFIGFS=y
+CONFIG_PCI_EPF_TEST=m
CONFIG_SMP=y
CONFIG_NR_CPUS=16
CONFIG_HIGHPTE=y
CONFIG_QCOM_COINCELL=m
CONFIG_APDS9802ALS=y
CONFIG_ISL29003=y
+CONFIG_PCI_ENDPOINT_TEST=m
CONFIG_EEPROM_AT24=y
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_DEV_SR=y
CONFIG_REGULATOR_WM8994=m
CONFIG_MEDIA_SUPPORT=m
CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_MEDIA_CEC_SUPPORT=y
CONFIG_MEDIA_CONTROLLER=y
CONFIG_VIDEO_V4L2_SUBDEV_API=y
CONFIG_MEDIA_USB_SUPPORT=y
CONFIG_VIDEO_RENESAS_JPU=m
CONFIG_VIDEO_RENESAS_VSP1=m
CONFIG_V4L_TEST_DRIVERS=y
+CONFIG_CEC_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_SAMSUNG_S5P_CEC=m
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
CONFIG_VIDEO_ADV7180=m
CONFIG_VIDEO_ML86V7667=m
CONFIG_DRM_PANEL_SAMSUNG_LD9040=m
CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m
CONFIG_DRM_PANEL_SIMPLE=y
+CONFIG_DRM_SII9234=m
CONFIG_DRM_STI=m
CONFIG_DRM_VC4=y
CONFIG_FB_ARMCLCD=y
CONFIG_SND_SOC_SAMSUNG_SMDK_WM8994=m
CONFIG_SND_SOC_SMDK_WM8994_PCM=m
CONFIG_SND_SOC_SNOW=m
+CONFIG_SND_SOC_ODROID=m
CONFIG_SND_SOC_SH4_FSI=m
CONFIG_SND_SOC_RCAR=m
CONFIG_SND_SIMPLE_SCU_CARD=m
CONFIG_PWM_ATMEL_HLCDC_PWM=m
CONFIG_PWM_ATMEL_TCB=m
CONFIG_PWM_FSL_FTM=m
+CONFIG_PWM_RCAR=m
CONFIG_PWM_RENESAS_TPU=y
CONFIG_PWM_ROCKCHIP=m
CONFIG_PWM_SAMSUNG=m
CONFIG_SOC_DRA7XX=y
CONFIG_ARM_THUMBEE=y
CONFIG_ARM_ERRATA_411920=y
+CONFIG_PCI=y
+CONFIG_PCI_MSI=y
+CONFIG_PCI_DRA7XX=y
+CONFIG_PCI_DRA7XX_EP=y
+CONFIG_PCI_ENDPOINT=y
+CONFIG_PCI_ENDPOINT_CONFIGFS=y
+CONFIG_PCI_EPF_TEST=m
CONFIG_SMP=y
CONFIG_NR_CPUS=2
CONFIG_CMA=y
CONFIG_BLK_DEV_RAM_SIZE=16384
CONFIG_SENSORS_TSL2550=m
CONFIG_SRAM=y
+CONFIG_PCI_ENDPOINT_TEST=m
CONFIG_EEPROM_AT24=m
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_SCAN_ASYNC=y
CONFIG_PWM_TIEHRPWM=m
CONFIG_PWM_TWL=m
CONFIG_PWM_TWL_LED=m
+CONFIG_PHY_CPCAP_USB=m
CONFIG_PHY_DM816X_USB=m
CONFIG_OMAP_USB2=m
CONFIG_TI_PIPE3=y
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
+CONFIG_KERNEL_MODE_NEON=y
+CONFIG_ARM_CRYPTO=y
+CONFIG_CRYPTO_SHA1_ARM=m
+CONFIG_CRYPTO_SHA1_ARM_NEON=m
+CONFIG_CRYPTO_SHA256_ARM=m
+CONFIG_CRYPTO_SHA512_ARM=m
+CONFIG_CRYPTO_AES_ARM=m
+CONFIG_CRYPTO_AES_ARM_BS=m
+CONFIG_CRYPTO_CHACHA20_NEON=m
+CONFIG_CRYPTO_GHASH_ARM_CE=m
CONFIG_REGULATOR_QCOM_SMD_RPM=y
CONFIG_REGULATOR_QCOM_SPMI=y
CONFIG_MEDIA_SUPPORT=y
+CONFIG_DRM=y
CONFIG_FB=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
# CONFIG_LCD_CLASS_DEVICE is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_MDM_LCC_9615=y
CONFIG_MSM_MMCC_8960=y
CONFIG_MSM_MMCC_8974=y
+CONFIG_MSM_IOMMU=y
CONFIG_HWSPINLOCK=y
CONFIG_HWSPINLOCK_QCOM=y
CONFIG_REMOTEPROC=y
CONFIG_SND_SOC_SH4_FSI=y
CONFIG_SND_SOC_RCAR=y
CONFIG_SND_SOC_AK4642=y
+CONFIG_SND_SOC_SGTL5000=y
CONFIG_SND_SOC_WM8978=y
CONFIG_SND_SIMPLE_SCU_CARD=y
CONFIG_USB=y
CONFIG_IIO=y
CONFIG_AK8975=y
CONFIG_PWM=y
+CONFIG_PWM_RCAR=y
CONFIG_PWM_RENESAS_TPU=y
CONFIG_GENERIC_PHY=y
CONFIG_PHY_RCAR_GEN2=y
{
int status;
- status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
+ status = gpio_request(DA850_LCD_BL_PIN, "lcd bl");
if (status < 0)
return status;
- status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
+ status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr");
if (status < 0) {
gpio_free(DA850_LCD_BL_PIN);
return status;
.num_resources = 0,
};
-static struct gpio_led ntosd2_leds[] = {
+static const struct gpio_led ntosd2_leds[] = {
{ .name = "led1_green", .gpio = GPIO(10), },
{ .name = "led1_red", .gpio = GPIO(11), },
{ .name = "led2_green", .gpio = GPIO(12), },
return -EINVAL;
}
-void __init davinci_common_init(struct davinci_soc_info *soc_info)
+void __init davinci_common_init(const struct davinci_soc_info *soc_info)
{
int ret;
.clocksource_id = T0_BOT,
};
-static struct davinci_soc_info davinci_soc_info_da830 = {
+static const struct davinci_soc_info davinci_soc_info_da830 = {
.io_desc = da830_io_desc,
.io_desc_num = ARRAY_SIZE(da830_io_desc),
.jtag_id_reg = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG,
return da8xx_register_gpio(&da850_gpio_platform_data);
}
-static struct davinci_soc_info davinci_soc_info_da850 = {
+static const struct davinci_soc_info davinci_soc_info_da850 = {
.io_desc = da850_io_desc,
.io_desc_num = ARRAY_SIZE(da850_io_desc),
.jtag_id_reg = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG,
da8xx_edma0_pdata.slavecnt = ARRAY_SIZE(da830_edma_map);
edma_pdev = platform_device_register_full(&da8xx_edma0_device);
- return IS_ERR(edma_pdev) ? PTR_ERR(edma_pdev) : 0;
+ return PTR_ERR_OR_ZERO(edma_pdev);
}
static const struct dma_slave_map da850_edma0_map[] = {
da850_edma1_pdata.slavecnt = ARRAY_SIZE(da850_edma1_map);
edma_pdev = platform_device_register_full(&da850_edma1_device);
- return IS_ERR(edma_pdev) ? PTR_ERR(edma_pdev) : 0;
+ return PTR_ERR_OR_ZERO(edma_pdev);
}
static struct resource da8xx_i2c_resources0[] = {
}
};
-static struct davinci_soc_info davinci_soc_info_dm355 = {
+static const struct davinci_soc_info davinci_soc_info_dm355 = {
.io_desc = dm355_io_desc,
.io_desc_num = ARRAY_SIZE(dm355_io_desc),
.jtag_id_reg = 0x01c40028,
}
};
-static struct davinci_soc_info davinci_soc_info_dm365 = {
+static const struct davinci_soc_info davinci_soc_info_dm365 = {
.io_desc = dm365_io_desc,
.io_desc_num = ARRAY_SIZE(dm365_io_desc),
.jtag_id_reg = 0x01c40028,
}
};
-static struct davinci_soc_info davinci_soc_info_dm644x = {
+static const struct davinci_soc_info davinci_soc_info_dm644x = {
.io_desc = dm644x_io_desc,
.io_desc_num = ARRAY_SIZE(dm644x_io_desc),
.jtag_id_reg = 0x01c40028,
}
};
-static struct davinci_soc_info davinci_soc_info_dm646x = {
+static const struct davinci_soc_info davinci_soc_info_dm646x = {
.io_desc = dm646x_io_desc,
.io_desc_num = ARRAY_SIZE(dm646x_io_desc),
.jtag_id_reg = 0x01c40028,
dm646x_edma_pdata.rsv = rsv;
edma_pdev = platform_device_register_full(&dm646x_edma_device);
- return IS_ERR(edma_pdev) ? PTR_ERR(edma_pdev) : 0;
+ return PTR_ERR_OR_ZERO(edma_pdev);
}
void __init dm646x_init(void)
extern struct davinci_soc_info davinci_soc_info;
-extern void davinci_common_init(struct davinci_soc_info *soc_info);
+extern void davinci_common_init(const struct davinci_soc_info *soc_info);
extern void davinci_init_ide(void);
void davinci_restart(enum reboot_mode mode, const char *cmd);
void davinci_init_late(void);
Say 'Y' here if you want your kernel to support the ADS
Sphere board.
+config MACH_BK3
+ bool "Support Liebherr BK3.1"
+ select MACH_TS72XX
+ help
+ Say 'Y' here if you want your kernel to support the
+ Liebherr controller BK3.1.
+
config MACH_EDB93XX
bool
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
+#include <linux/spi/mmc_spi.h>
+#include <linux/mmc/host.h>
#include <linux/platform_data/spi-ep93xx.h>
#include <mach/gpio-ep93xx.h>
#include <mach/hardware.h>
+#include <mach/irqs.h>
+#include <mach/gpio-ep93xx.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>
#include "soc.h"
#include "ts72xx.h"
+/*************************************************************************
+ * IO map
+ *************************************************************************/
static struct map_desc ts72xx_io_desc[] __initdata = {
{
.virtual = (unsigned long)TS72XX_MODEL_VIRT_BASE,
.pfn = __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
.length = TS72XX_OPTIONS2_SIZE,
.type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)TS72XX_CPLDVER_VIRT_BASE,
+ .pfn = __phys_to_pfn(TS72XX_CPLDVER_PHYS_BASE),
+ .length = TS72XX_CPLDVER_SIZE,
+ .type = MT_DEVICE,
}
};
.nr_chips = 1,
.chip_offset = 0,
.chip_delay = 15,
- .partitions = ts72xx_nand_parts,
- .nr_partitions = ARRAY_SIZE(ts72xx_nand_parts),
},
.ctrl = {
.cmd_ctrl = ts72xx_nand_hwcontrol,
.num_resources = ARRAY_SIZE(ts72xx_nand_resource),
};
-
-static void __init ts72xx_register_flash(void)
+void __init ts72xx_register_flash(struct mtd_partition *parts, int n,
+ resource_size_t start)
{
/*
* TS7200 has NOR flash all other TS72xx board have NAND flash.
if (board_is_ts7200()) {
ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_16M);
} else {
- resource_size_t start;
-
- if (is_ts9420_installed())
- start = EP93XX_CS7_PHYS_BASE;
- else
- start = EP93XX_CS6_PHYS_BASE;
-
ts72xx_nand_resource[0].start = start;
ts72xx_nand_resource[0].end = start + SZ_16M - 1;
+ ts72xx_nand_data.chip.partitions = parts;
+ ts72xx_nand_data.chip.nr_partitions = n;
+
platform_device_register(&ts72xx_nand_flash);
}
}
.num_resources = ARRAY_SIZE(ts72xx_wdt_resources),
};
+/*************************************************************************
+ * ETH
+ *************************************************************************/
static struct ep93xx_eth_data __initdata ts72xx_eth_data = {
.phy_id = 1,
};
+/*************************************************************************
+ * SPI SD/MMC host
+ *************************************************************************/
+#define BK3_EN_SDCARD_PHYS_BASE 0x12400000
+#define BK3_EN_SDCARD_PWR 0x0
+#define BK3_DIS_SDCARD_PWR 0x0C
+static void bk3_mmc_spi_setpower(struct device *dev, unsigned int vdd)
+{
+ void __iomem *pwr_sd = ioremap(BK3_EN_SDCARD_PHYS_BASE, SZ_4K);
+
+ if (!pwr_sd) {
+ pr_err("Failed to enable SD card power!");
+ return;
+ }
+
+ pr_debug("%s: SD card pwr %s VDD:0x%x\n", __func__,
+ !!vdd ? "ON" : "OFF", vdd);
+
+ if (!!vdd)
+ __raw_writeb(BK3_EN_SDCARD_PWR, pwr_sd);
+ else
+ __raw_writeb(BK3_DIS_SDCARD_PWR, pwr_sd);
+
+ iounmap(pwr_sd);
+}
+
+static struct mmc_spi_platform_data bk3_spi_mmc_data = {
+ .detect_delay = 500,
+ .powerup_msecs = 100,
+ .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
+ .caps = MMC_CAP_NONREMOVABLE,
+ .setpower = bk3_mmc_spi_setpower,
+};
+
+/*************************************************************************
+ * SPI Bus - SD card access
+ *************************************************************************/
+static struct spi_board_info bk3_spi_board_info[] __initdata = {
+ {
+ .modalias = "mmc_spi",
+ .platform_data = &bk3_spi_mmc_data,
+ .max_speed_hz = 7.4E6,
+ .bus_num = 0,
+ .chip_select = 0,
+ .mode = SPI_MODE_0,
+ },
+};
+
+/*
+ * This is a stub -> the FGPIO[3] pin is not connected on the schematic
+ * The all work is performed automatically by !SPI_FRAME (SFRM1) and
+ * goes through CPLD
+ */
+static int bk3_spi_chipselects[] __initdata = {
+ EP93XX_GPIO_LINE_F(3),
+};
+
+static struct ep93xx_spi_info bk3_spi_master __initdata = {
+ .chipselect = bk3_spi_chipselects,
+ .num_chipselect = ARRAY_SIZE(bk3_spi_chipselects),
+ .use_dma = 1,
+};
+
+/*************************************************************************
+ * TS72XX support code
+ *************************************************************************/
#if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
/* Relative to EP93XX_CS1_PHYS_BASE */
static void __init ts72xx_init_machine(void)
{
ep93xx_init_devices();
- ts72xx_register_flash();
+ ts72xx_register_flash(ts72xx_nand_parts, ARRAY_SIZE(ts72xx_nand_parts),
+ is_ts9420_installed() ?
+ EP93XX_CS7_PHYS_BASE : EP93XX_CS6_PHYS_BASE);
platform_device_register(&ts72xx_rtc_device);
platform_device_register(&ts72xx_wdt_device);
.init_late = ep93xx_init_late,
.restart = ep93xx_restart,
MACHINE_END
+
+/*************************************************************************
+ * EP93xx I2S audio peripheral handling
+ *************************************************************************/
+static struct resource ep93xx_i2s_resource[] = {
+ DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
+ DEFINE_RES_IRQ_NAMED(IRQ_EP93XX_SAI, "spilink i2s slave"),
+};
+
+static struct platform_device ep93xx_i2s_device = {
+ .name = "ep93xx-spilink-i2s",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
+ .resource = ep93xx_i2s_resource,
+};
+
+/*************************************************************************
+ * BK3 support code
+ *************************************************************************/
+static struct mtd_partition bk3_nand_parts[] = {
+ {
+ .name = "System",
+ .offset = 0x00000000,
+ .size = 0x01e00000,
+ }, {
+ .name = "Data",
+ .offset = 0x01e00000,
+ .size = 0x05f20000
+ }, {
+ .name = "RedBoot",
+ .offset = 0x07d20000,
+ .size = 0x002e0000,
+ .mask_flags = MTD_WRITEABLE, /* force RO */
+ },
+};
+
+static void __init bk3_init_machine(void)
+{
+ ep93xx_init_devices();
+
+ ts72xx_register_flash(bk3_nand_parts, ARRAY_SIZE(bk3_nand_parts),
+ EP93XX_CS6_PHYS_BASE);
+
+ ep93xx_register_eth(&ts72xx_eth_data, 1);
+
+ ep93xx_register_spi(&bk3_spi_master, bk3_spi_board_info,
+ ARRAY_SIZE(bk3_spi_board_info));
+
+ /* Configure ep93xx's I2S to use AC97 pins */
+ ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
+ platform_device_register(&ep93xx_i2s_device);
+}
+
+MACHINE_START(BK3, "Liebherr controller BK3.1")
+ /* Maintainer: Lukasz Majewski <lukma@denx.de> */
+ .atag_offset = 0x100,
+ .map_io = ts72xx_map_io,
+ .init_irq = ep93xx_init_irq,
+ .init_time = ep93xx_timer_init,
+ .init_machine = bk3_init_machine,
+ .init_late = ep93xx_init_late,
+ .restart = ep93xx_restart,
+MACHINE_END
* febff000 22000000 4K model number register (bits 0-2)
* febfe000 22400000 4K options register
* febfd000 22800000 4K options register #2
+ * febfc000 23400000 4K CPLD version register
*/
+#ifndef __TS72XX_H_
+#define __TS72XX_H_
+
#define TS72XX_MODEL_PHYS_BASE 0x22000000
#define TS72XX_MODEL_VIRT_BASE IOMEM(0xfebff000)
#define TS72XX_MODEL_SIZE 0x00001000
#define TS72XX_OPTIONS2_TS9420 0x04
#define TS72XX_OPTIONS2_TS9420_BOOT 0x02
+#define TS72XX_CPLDVER_PHYS_BASE 0x23400000
+#define TS72XX_CPLDVER_VIRT_BASE IOMEM(0xfebfc000)
+#define TS72XX_CPLDVER_SIZE 0x00001000
+
#ifndef __ASSEMBLY__
static inline int ts72xx_model(void)
TS72XX_OPTIONS2_TS9420);
}
#endif
+#endif /* __TS72XX_H_ */
-# arch/arm/mach-exynos/Kconfig
+# SPDX-License-Identifier: GPL-2.0
#
# Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
# http://www.samsung.com/
-#
-# Licensed under GPLv2
# Configuration options for the EXYNOS
-# arch/arm/mach-exynos/Makefile
+# SPDX-License-Identifier: GPL-2.0
#
# Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
# http://www.samsung.com/
-#
-# Licensed under GPLv2
ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/$(src)/include -I$(srctree)/arch/arm/plat-samsung/include
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Common Header for EXYNOS machines
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2012 Samsung Electronics.
*
* Copied from omap-smc.S Copyright (C) 2010 Texas Instruments, Inc.
- *
- * This program is free software,you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#include <linux/linkage.h>
-/*
- * SAMSUNG EXYNOS Flattened Device Tree enabled machine
- *
- * Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// SAMSUNG EXYNOS Flattened Device Tree enabled machine
+//
+// Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
+// http://www.samsung.com
#include <linux/init.h>
#include <linux/io.h>
-/*
- * Copyright (C) 2012 Samsung Electronics.
- * Kyungmin Park <kyungmin.park@samsung.com>
- * Tomasz Figa <t.figa@samsung.com>
- *
- * This program is free software,you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (C) 2012 Samsung Electronics.
+// Kyungmin Park <kyungmin.park@samsung.com>
+// Tomasz Figa <t.figa@samsung.com>
#include <linux/kernel.h>
#include <linux/io.h>
+/* SPDX-License-Identifier: GPL-2.0 */
/*
- *
* Cloned from linux/arch/arm/mach-realview/headsmp.S
*
* Copyright (c) 2003 ARM Limited
* All Rights Reserved
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#include <linux/linkage.h>
#include <linux/init.h>
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
*
* EXYNOS - Memory map definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __ASM_ARCH_MAP_H
#define __ASM_ARCH_MAP_H __FILE__
-/*
- * Copyright (c) 2014 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * arch/arm/mach-exynos/mcpm-exynos.c
- *
- * Based on arch/arm/mach-vexpress/dcscb.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2014 Samsung Electronics Co., Ltd.
+// http://www.samsung.com
+//
+// Based on arch/arm/mach-vexpress/dcscb.c
#include <linux/arm-cci.h>
#include <linux/delay.h>
- /*
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * Cloned from linux/arch/arm/mach-vexpress/platsmp.c
- *
- * Copyright (C) 2002 ARM Ltd.
- * All Rights Reserved
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+// http://www.samsung.com
+//
+// Cloned from linux/arch/arm/mach-vexpress/platsmp.c
+//
+// Copyright (C) 2002 ARM Ltd.
+// All Rights Reserved
#include <linux/init.h>
#include <linux/errno.h>
-/*
- * Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * EXYNOS - Power Management support
- *
- * Based on arch/arm/mach-s3c2410/pm.c
- * Copyright (c) 2006 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.
+// http://www.samsung.com
+//
+// EXYNOS - Power Management support
+//
+// Based on arch/arm/mach-s3c2410/pm.c
+// Copyright (c) 2006 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
#include <linux/init.h>
#include <linux/suspend.h>
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Exynos low-level resume code
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
#include <linux/linkage.h>
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2012 Samsung Electronics.
*
* EXYNOS - SMC Call
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_EXYNOS_SMC_H
-/*
- * Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * EXYNOS - Suspend support
- *
- * Based on arch/arm/mach-s3c2410/pm.c
- * Copyright (c) 2006 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.
+// http://www.samsung.com
+//
+// EXYNOS - Suspend support
+//
+// Based on arch/arm/mach-s3c2410/pm.c
+// Copyright (c) 2006 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
#include <linux/init.h>
#include <linux/suspend.h>
STOP_POWER_OFF, /* STOP + SRPG */
};
-enum mx3_cpu_pwr_mode {
- MX3_RUN,
- MX3_WAIT,
- MX3_DOZE,
- MX3_SLEEP,
-};
-
-void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);
-
void imx_enable_cpu(int cpu, bool enable);
void imx_set_cpu_jump(int cpu, void *jump_addr);
u32 imx_get_cpu_arg(int cpu);
struct device_node *np = pdev->dev.of_node;
void __iomem *mmdc_base, *reg;
u32 val;
- int timeout = 0x400;
mmdc_base = of_iomap(np, 0);
WARN_ON(!mmdc_base);
val &= ~(1 << BP_MMDC_MAPSR_PSD);
writel_relaxed(val, reg);
- /* Ensure it's successfully enabled */
- while (!(readl_relaxed(reg) & 1 << BP_MMDC_MAPSR_PSS) && --timeout)
- cpu_relax();
-
- if (unlikely(!timeout)) {
- pr_warn("%s: failed to enable automatic power saving\n",
- __func__);
- return -EBUSY;
- }
-
return imx_mmdc_perf_init(pdev, mmdc_base);
}
menuconfig ARCH_MEDIATEK
- bool "Mediatek MT65xx & MT81xx SoC"
+ bool "MediaTek SoC Support"
depends on ARCH_MULTI_V7
select ARM_GIC
select PINCTRL
extern void mmp2_clear_pmic_int(void);
#include <linux/i2c.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <linux/platform_data/dma-mmp_tdma.h>
#include "devices.h"
extern void pxa168_clear_keypad_wakeup(void);
#include <linux/i2c.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <linux/platform_data/mtd-nand-pxa3xx.h>
#include <video/pxa168fb.h>
#include <linux/platform_data/keypad-pxa27x.h>
extern void __init pxa910_init_irq(void);
#include <linux/i2c.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <linux/platform_data/mtd-nand-pxa3xx.h>
#include <video/mmp_disp.h>
* published by the Free Software Foundation.
*/
-#define OMAP24XX_EN_CAM_SHIFT 31
-#define OMAP24XX_EN_WDT4_SHIFT 29
-#define OMAP2420_EN_WDT3_SHIFT 28
-#define OMAP24XX_EN_MSPRO_SHIFT 27
-#define OMAP24XX_EN_FAC_SHIFT 25
-#define OMAP2420_EN_EAC_SHIFT 24
-#define OMAP24XX_EN_HDQ_SHIFT 23
-#define OMAP2420_EN_I2C2_SHIFT 20
-#define OMAP2420_EN_I2C1_SHIFT 19
-#define OMAP2430_EN_MCBSP5_SHIFT 5
-#define OMAP2430_EN_MCBSP4_SHIFT 4
-#define OMAP2430_EN_MCBSP3_SHIFT 3
-#define OMAP24XX_EN_SSI_SHIFT 1
-#define OMAP24XX_EN_MPU_WDT_SHIFT 3
-#define OMAP24XX_CLKSEL_MPU_SHIFT 0
-#define OMAP24XX_CLKSEL_MPU_WIDTH 5
#define OMAP24XX_AUTOSTATE_MPU_MASK (1 << 0)
-#define OMAP24XX_EN_TV_SHIFT 2
-#define OMAP24XX_EN_DSS2_SHIFT 1
-#define OMAP24XX_EN_DSS1_SHIFT 0
#define OMAP24XX_EN_DSS1_MASK (1 << 0)
-#define OMAP2430_EN_I2CHS2_SHIFT 20
-#define OMAP2430_EN_I2CHS1_SHIFT 19
-#define OMAP2430_EN_MMCHSDB2_SHIFT 17
-#define OMAP2430_EN_MMCHSDB1_SHIFT 16
-#define OMAP24XX_EN_MAILBOXES_SHIFT 30
-#define OMAP2430_EN_SDRC_SHIFT 2
-#define OMAP24XX_EN_PKA_SHIFT 4
-#define OMAP24XX_EN_AES_SHIFT 3
-#define OMAP24XX_EN_RNG_SHIFT 2
-#define OMAP24XX_EN_SHA_SHIFT 1
-#define OMAP24XX_EN_DES_SHIFT 0
#define OMAP24XX_ST_MAILBOXES_SHIFT 30
#define OMAP24XX_ST_HDQ_SHIFT 23
#define OMAP2420_ST_I2C2_SHIFT 20
#define OMAP2430_ST_I2CHS2_SHIFT 20
#define OMAP24XX_ST_MCBSP2_SHIFT 16
#define OMAP24XX_ST_MCBSP1_SHIFT 15
-#define OMAP24XX_ST_DSS_SHIFT 0
#define OMAP2430_ST_MCBSP5_SHIFT 5
#define OMAP2430_ST_MCBSP4_SHIFT 4
#define OMAP2430_ST_MCBSP3_SHIFT 3
#define OMAP24XX_ST_AES_SHIFT 3
#define OMAP24XX_ST_RNG_SHIFT 2
#define OMAP24XX_ST_SHA_SHIFT 1
-#define OMAP24XX_AUTO_SDRC_SHIFT 2
-#define OMAP24XX_AUTO_GPMC_SHIFT 1
-#define OMAP24XX_AUTO_SDMA_SHIFT 0
-#define OMAP24XX_CLKSEL_USB_MASK (0x7 << 25)
-#define OMAP24XX_CLKSEL_SSI_MASK (0x1f << 20)
-#define OMAP2420_CLKSEL_VLYNQ_MASK (0x1f << 15)
#define OMAP24XX_CLKSEL_DSS2_MASK (0x1 << 13)
-#define OMAP24XX_CLKSEL_DSS1_MASK (0x1f << 8)
-#define OMAP24XX_CLKSEL_L4_SHIFT 5
-#define OMAP24XX_CLKSEL_L4_WIDTH 2
-#define OMAP24XX_CLKSEL_L3_SHIFT 0
-#define OMAP24XX_CLKSEL_L3_WIDTH 5
-#define OMAP24XX_CLKSEL_GPT12_MASK (0x3 << 22)
-#define OMAP24XX_CLKSEL_GPT11_MASK (0x3 << 20)
-#define OMAP24XX_CLKSEL_GPT10_MASK (0x3 << 18)
-#define OMAP24XX_CLKSEL_GPT9_MASK (0x3 << 16)
-#define OMAP24XX_CLKSEL_GPT8_MASK (0x3 << 14)
-#define OMAP24XX_CLKSEL_GPT7_MASK (0x3 << 12)
-#define OMAP24XX_CLKSEL_GPT6_MASK (0x3 << 10)
-#define OMAP24XX_CLKSEL_GPT5_MASK (0x3 << 8)
-#define OMAP24XX_CLKSEL_GPT4_MASK (0x3 << 6)
-#define OMAP24XX_CLKSEL_GPT3_MASK (0x3 << 4)
-#define OMAP24XX_CLKSEL_GPT2_MASK (0x3 << 2)
#define OMAP24XX_AUTOSTATE_DSS_MASK (1 << 2)
#define OMAP24XX_AUTOSTATE_L4_MASK (1 << 1)
#define OMAP24XX_AUTOSTATE_L3_MASK (1 << 0)
-#define OMAP24XX_EN_3D_SHIFT 2
-#define OMAP24XX_EN_2D_SHIFT 1
#define OMAP24XX_AUTOSTATE_GFX_MASK (1 << 0)
-#define OMAP2430_EN_ICR_SHIFT 6
-#define OMAP24XX_EN_OMAPCTRL_SHIFT 5
-#define OMAP24XX_EN_WDT1_SHIFT 4
-#define OMAP24XX_EN_32KSYNC_SHIFT 1
#define OMAP24XX_ST_MPU_WDT_SHIFT 3
#define OMAP24XX_ST_32KSYNC_SHIFT 1
-#define OMAP24XX_CLKSEL_GPT1_MASK (0x3 << 0)
#define OMAP24XX_EN_54M_PLL_SHIFT 6
#define OMAP24XX_EN_96M_PLL_SHIFT 2
-#define OMAP24XX_EN_DPLL_MASK (0x3 << 0)
#define OMAP24XX_ST_54M_APLL_SHIFT 9
#define OMAP24XX_ST_96M_APLL_SHIFT 8
#define OMAP24XX_AUTO_54M_MASK (0x3 << 6)
#define OMAP24XX_AUTO_96M_MASK (0x3 << 2)
#define OMAP24XX_AUTO_DPLL_SHIFT 0
#define OMAP24XX_AUTO_DPLL_MASK (0x3 << 0)
-#define OMAP24XX_APLLS_CLKIN_SHIFT 23
-#define OMAP24XX_APLLS_CLKIN_WIDTH 3
-#define OMAP24XX_APLLS_CLKIN_MASK (0x7 << 23)
-#define OMAP24XX_DPLL_MULT_MASK (0x3ff << 12)
-#define OMAP24XX_DPLL_DIV_MASK (0xf << 8)
-#define OMAP24XX_54M_SOURCE_SHIFT 5
-#define OMAP24XX_54M_SOURCE_WIDTH 1
-#define OMAP2430_96M_SOURCE_SHIFT 4
-#define OMAP2430_96M_SOURCE_WIDTH 1
-#define OMAP24XX_48M_SOURCE_MASK (1 << 3)
#define OMAP24XX_CORE_CLK_SRC_MASK (0x3 << 0)
-#define OMAP2420_EN_IVA_COP_SHIFT 10
-#define OMAP2420_EN_IVA_MPU_SHIFT 8
-#define OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT 0
-#define OMAP2420_EN_DSP_IPI_SHIFT 1
-#define OMAP2420_CLKSEL_IVA_MASK (0x1f << 8)
-#define OMAP24XX_CLKSEL_DSP_IF_MASK (0x3 << 5)
-#define OMAP24XX_CLKSEL_DSP_MASK (0x1f << 0)
#define OMAP2420_AUTOSTATE_IVA_MASK (1 << 8)
#define OMAP24XX_AUTOSTATE_DSP_MASK (1 << 0)
-#define OMAP2430_EN_OSC_SHIFT 1
-#define OMAP2430_CM_ICLKEN_MDM_EN_MDM_SHIFT 0
-#define OMAP2430_CLKSEL_MDM_MASK (0xf << 0)
#define OMAP2430_AUTOSTATE_MDM_MASK (1 << 0)
#define OMAP24XX_CLKSTCTRL_DISABLE_AUTO 0x0
#define OMAP24XX_CLKSTCTRL_ENABLE_AUTO 0x1
* published by the Free Software Foundation.
*/
-#define OMAP3430ES2_EN_MMC3_SHIFT 30
-#define OMAP3430_EN_MSPRO_SHIFT 23
-#define OMAP3430_EN_HDQ_SHIFT 22
-#define OMAP3430ES1_EN_FSHOSTUSB_SHIFT 5
-#define OMAP3430ES1_EN_D2D_SHIFT 3
-#define OMAP3430_EN_SSI_SHIFT 0
-#define OMAP3430ES2_EN_USBTLL_SHIFT 2
-#define OMAP3430_EN_WDT2_SHIFT 5
-#define OMAP3430_EN_CAM_SHIFT 0
-#define OMAP3430_EN_WDT3_SHIFT 12
#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_MASK (1 << 0)
-#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT 0
-#define OMAP3430_IVA2_DPLL_FREQSEL_SHIFT 4
-#define OMAP3430_IVA2_DPLL_FREQSEL_MASK (0xf << 4)
-#define OMAP3430_EN_IVA2_DPLL_DRIFTGUARD_SHIFT 3
-#define OMAP3430_EN_IVA2_DPLL_SHIFT 0
-#define OMAP3430_EN_IVA2_DPLL_MASK (0x7 << 0)
#define OMAP3430_ST_IVA2_SHIFT 0
-#define OMAP3430_ST_IVA2_CLK_MASK (1 << 0)
-#define OMAP3430_AUTO_IVA2_DPLL_SHIFT 0
-#define OMAP3430_AUTO_IVA2_DPLL_MASK (0x7 << 0)
-#define OMAP3430_IVA2_CLK_SRC_SHIFT 19
-#define OMAP3430_IVA2_CLK_SRC_WIDTH 3
-#define OMAP3430_IVA2_DPLL_MULT_MASK (0x7ff << 8)
-#define OMAP3430_IVA2_DPLL_DIV_MASK (0x7f << 0)
-#define OMAP3430_IVA2_DPLL_CLKOUT_DIV_SHIFT 0
-#define OMAP3430_IVA2_DPLL_CLKOUT_DIV_WIDTH 5
#define OMAP3430_CLKTRCTRL_IVA2_MASK (0x3 << 0)
#define OMAP3430_CLKACTIVITY_IVA2_MASK (1 << 0)
-#define OMAP3430_MPU_DPLL_FREQSEL_MASK (0xf << 4)
-#define OMAP3430_EN_MPU_DPLL_DRIFTGUARD_SHIFT 3
-#define OMAP3430_EN_MPU_DPLL_MASK (0x7 << 0)
-#define OMAP3430_ST_MPU_CLK_SHIFT 0
-#define OMAP3430_ST_MPU_CLK_MASK (1 << 0)
-#define OMAP3430_ST_MPU_CLK_WIDTH 1
-#define OMAP3430_AUTO_MPU_DPLL_MASK (0x7 << 0)
-#define OMAP3430_MPU_CLK_SRC_SHIFT 19
-#define OMAP3430_MPU_CLK_SRC_WIDTH 3
-#define OMAP3430_MPU_DPLL_MULT_MASK (0x7ff << 8)
-#define OMAP3430_MPU_DPLL_DIV_MASK (0x7f << 0)
-#define OMAP3430_MPU_DPLL_CLKOUT_DIV_SHIFT 0
-#define OMAP3430_MPU_DPLL_CLKOUT_DIV_WIDTH 5
#define OMAP3430_CLKTRCTRL_MPU_MASK (0x3 << 0)
-#define OMAP3430_EN_MODEM_SHIFT 31
-#define OMAP3430_EN_ICR_SHIFT 29
-#define OMAP3430_EN_AES2_SHIFT 28
-#define OMAP3430_EN_SHA12_SHIFT 27
-#define OMAP3430_EN_DES2_SHIFT 26
-#define OMAP3430ES1_EN_FAC_SHIFT 8
-#define OMAP3430_EN_MAILBOXES_SHIFT 7
-#define OMAP3430_EN_OMAPCTRL_SHIFT 6
-#define OMAP3430_EN_SAD2D_SHIFT 3
-#define OMAP3430_EN_SDRC_SHIFT 1
-#define AM35XX_EN_IPSS_SHIFT 4
-#define OMAP3430_EN_PKA_SHIFT 4
-#define OMAP3430_EN_AES1_SHIFT 3
-#define OMAP3430_EN_RNG_SHIFT 2
-#define OMAP3430_EN_SHA11_SHIFT 1
-#define OMAP3430_EN_DES1_SHIFT 0
-#define OMAP3430_EN_MAD2D_SHIFT 3
-#define OMAP3430ES2_EN_TS_SHIFT 1
-#define OMAP3430ES2_EN_CPEFUSE_SHIFT 0
#define OMAP3430_ST_AES2_SHIFT 28
#define OMAP3430_ST_SHA12_SHIFT 27
#define AM35XX_ST_UART4_SHIFT 23
#define OMAP3430_ST_MAILBOXES_SHIFT 7
#define OMAP3430_ST_SAD2D_SHIFT 3
#define OMAP3430_ST_SDMA_SHIFT 2
-#define AM35XX_ST_IPSS_SHIFT 5
#define OMAP3430ES2_ST_USBTLL_SHIFT 2
-#define OMAP3430_CLKSEL_SSI_MASK (0xf << 8)
-#define OMAP3430_CLKSEL_GPT11_MASK (1 << 7)
-#define OMAP3430_CLKSEL_GPT10_MASK (1 << 6)
-#define OMAP3430ES1_CLKSEL_FSHOSTUSB_MASK (0x3 << 4)
-#define OMAP3430_CLKSEL_L4_SHIFT 2
-#define OMAP3430_CLKSEL_L4_WIDTH 2
-#define OMAP3430_CLKSEL_L3_SHIFT 0
-#define OMAP3430_CLKSEL_L3_WIDTH 2
-#define OMAP3630_CLKSEL_96M_MASK (0x3 << 12)
#define OMAP3430ES1_CLKTRCTRL_D2D_MASK (0x3 << 4)
#define OMAP3430_CLKTRCTRL_L4_MASK (0x3 << 2)
#define OMAP3430_CLKTRCTRL_L3_MASK (0x3 << 0)
-#define OMAP3430ES1_EN_3D_SHIFT 2
-#define OMAP3430ES1_EN_2D_SHIFT 1
#define OMAP3430ES1_CLKTRCTRL_GFX_MASK (0x3 << 0)
-#define OMAP3430ES2_CM_FCLKEN_SGX_EN_SGX_SHIFT 1
-#define OMAP3430ES2_CM_ICLKEN_SGX_EN_SGX_SHIFT 0
-#define OMAP3430ES2_CLKSEL_SGX_MASK (0x7 << 0)
#define OMAP3430ES2_CLKTRCTRL_SGX_MASK (0x3 << 0)
-#define OMAP3430ES2_EN_USIMOCP_SHIFT 9
-#define OMAP3430_EN_WDT1_SHIFT 4
-#define OMAP3430_EN_32KSYNC_SHIFT 2
#define OMAP3430_ST_WDT2_SHIFT 5
#define OMAP3430_ST_32KSYNC_SHIFT 2
-#define OMAP3430ES2_CLKSEL_USIMOCP_MASK (0xf << 3)
-#define OMAP3430_CLKSEL_RM_SHIFT 1
-#define OMAP3430_CLKSEL_RM_WIDTH 2
-#define OMAP3430_CLKSEL_GPT1_MASK (1 << 0)
-#define OMAP3430_PWRDN_EMU_PERIPH_SHIFT 31
-#define OMAP3430_PWRDN_CAM_SHIFT 30
-#define OMAP3430_PWRDN_DSS1_SHIFT 29
-#define OMAP3430_PWRDN_TV_SHIFT 28
-#define OMAP3430_PWRDN_96M_SHIFT 27
-#define OMAP3430_PERIPH_DPLL_FREQSEL_MASK (0xf << 20)
-#define OMAP3430_EN_PERIPH_DPLL_DRIFTGUARD_SHIFT 19
-#define OMAP3430_EN_PERIPH_DPLL_MASK (0x7 << 16)
-#define OMAP3430_PWRDN_EMU_CORE_SHIFT 12
-#define OMAP3430_CORE_DPLL_FREQSEL_MASK (0xf << 4)
-#define OMAP3430_EN_CORE_DPLL_DRIFTGUARD_SHIFT 3
-#define OMAP3430_EN_CORE_DPLL_MASK (0x7 << 0)
-#define OMAP3430ES2_PERIPH2_DPLL_FREQSEL_MASK (0xf << 4)
-#define OMAP3430ES2_EN_PERIPH2_DPLL_DRIFTGUARD_SHIFT 3
-#define OMAP3430ES2_EN_PERIPH2_DPLL_MASK (0x7 << 0)
-#define OMAP3430_ST_PERIPH_CLK_MASK (1 << 1)
-#define OMAP3430_ST_CORE_CLK_MASK (1 << 0)
-#define OMAP3430ES2_ST_PERIPH2_CLK_MASK (1 << 0)
#define OMAP3430_AUTO_PERIPH_DPLL_MASK (0x7 << 3)
-#define OMAP3430_AUTO_CORE_DPLL_MASK (0x7 << 0)
-#define OMAP3430ES2_AUTO_PERIPH2_DPLL_MASK (0x7 << 0)
-#define OMAP3430_CORE_DPLL_CLKOUT_DIV_SHIFT 27
-#define OMAP3430_CORE_DPLL_CLKOUT_DIV_WIDTH 5
-#define OMAP3430_CORE_DPLL_MULT_MASK (0x7ff << 16)
-#define OMAP3430_CORE_DPLL_DIV_MASK (0x7f << 8)
-#define OMAP3430_SOURCE_96M_SHIFT 6
-#define OMAP3430_SOURCE_96M_WIDTH 1
-#define OMAP3430_SOURCE_54M_SHIFT 5
-#define OMAP3430_SOURCE_54M_WIDTH 1
-#define OMAP3430_SOURCE_48M_MASK (1 << 3)
-#define OMAP3430_PERIPH_DPLL_MULT_MASK (0x7ff << 8)
-#define OMAP3630_PERIPH_DPLL_MULT_MASK (0xfff << 8)
-#define OMAP3430_PERIPH_DPLL_DIV_MASK (0x7f << 0)
-#define OMAP3630_PERIPH_DPLL_DCO_SEL_MASK (0x7 << 21)
-#define OMAP3630_PERIPH_DPLL_SD_DIV_MASK (0xff << 24)
-#define OMAP3430_DIV_96M_SHIFT 0
-#define OMAP3630_DIV_96M_WIDTH 6
-#define OMAP3430ES2_PERIPH2_DPLL_MULT_MASK (0x7ff << 8)
-#define OMAP3430ES2_PERIPH2_DPLL_DIV_MASK (0x7f << 0)
-#define OMAP3430ES2_DIV_120M_SHIFT 0
-#define OMAP3430ES2_DIV_120M_WIDTH 5
-#define OMAP3430_CLKOUT2_EN_SHIFT 7
-#define OMAP3430_CLKOUT2_DIV_SHIFT 3
-#define OMAP3430_CLKOUT2_DIV_WIDTH 3
-#define OMAP3430_CLKOUT2SOURCE_MASK (0x3 << 0)
-#define OMAP3430_EN_TV_SHIFT 2
-#define OMAP3430_EN_DSS2_SHIFT 1
-#define OMAP3430_EN_DSS1_SHIFT 0
-#define OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT 0
#define OMAP3430ES2_ST_DSS_IDLE_SHIFT 1
-#define OMAP3430ES2_ST_DSS_STDBY_SHIFT 0
-#define OMAP3430ES1_ST_DSS_SHIFT 0
-#define OMAP3430_CLKSEL_TV_SHIFT 8
-#define OMAP3630_CLKSEL_TV_WIDTH 6
-#define OMAP3430_CLKSEL_DSS1_SHIFT 0
-#define OMAP3630_CLKSEL_DSS1_WIDTH 6
#define OMAP3430_CLKTRCTRL_DSS_MASK (0x3 << 0)
-#define OMAP3430_EN_CSI2_SHIFT 1
-#define OMAP3430_CLKSEL_CAM_SHIFT 0
-#define OMAP3630_CLKSEL_CAM_WIDTH 6
#define OMAP3430_CLKTRCTRL_CAM_MASK (0x3 << 0)
#define OMAP3430_ST_MCBSP4_SHIFT 2
#define OMAP3430_ST_MCBSP3_SHIFT 1
#define OMAP3430_ST_MCBSP2_SHIFT 0
-#define OMAP3430_CLKSEL_GPT9_MASK (1 << 7)
-#define OMAP3430_CLKSEL_GPT8_MASK (1 << 6)
-#define OMAP3430_CLKSEL_GPT7_MASK (1 << 5)
-#define OMAP3430_CLKSEL_GPT6_MASK (1 << 4)
-#define OMAP3430_CLKSEL_GPT5_MASK (1 << 3)
-#define OMAP3430_CLKSEL_GPT4_MASK (1 << 2)
-#define OMAP3430_CLKSEL_GPT3_MASK (1 << 1)
-#define OMAP3430_CLKSEL_GPT2_MASK (1 << 0)
#define OMAP3430_CLKTRCTRL_PER_MASK (0x3 << 0)
-#define OMAP3430_DIV_DPLL4_SHIFT 24
-#define OMAP3630_DIV_DPLL4_WIDTH 6
-#define OMAP3430_DIV_DPLL3_SHIFT 16
-#define OMAP3430_DIV_DPLL3_WIDTH 5
-#define OMAP3430_CLKSEL_TRACECLK_SHIFT 11
-#define OMAP3430_CLKSEL_TRACECLK_WIDTH 3
-#define OMAP3430_CLKSEL_PCLK_SHIFT 8
-#define OMAP3430_CLKSEL_PCLK_WIDTH 3
-#define OMAP3430_CLKSEL_PCLKX2_SHIFT 6
-#define OMAP3430_CLKSEL_PCLKX2_WIDTH 2
-#define OMAP3430_CLKSEL_ATCLK_SHIFT 4
-#define OMAP3430_CLKSEL_ATCLK_WIDTH 2
-#define OMAP3430_TRACE_MUX_CTRL_SHIFT 2
-#define OMAP3430_TRACE_MUX_CTRL_WIDTH 2
-#define OMAP3430_MUX_CTRL_MASK (0x3 << 0)
#define OMAP3430_CLKTRCTRL_EMU_MASK (0x3 << 0)
#define OMAP3430_CLKTRCTRL_NEON_MASK (0x3 << 0)
#define OMAP3430ES2_EN_USBHOST2_SHIFT 1
-#define OMAP3430ES2_EN_USBHOST1_SHIFT 0
-#define OMAP3430ES2_EN_USBHOST_SHIFT 0
#define OMAP3430ES2_ST_USBHOST_IDLE_SHIFT 1
-#define OMAP3430ES2_ST_USBHOST_STDBY_SHIFT 0
#define OMAP3430ES2_CLKTRCTRL_USBHOST_MASK (3 << 0)
#define OMAP34XX_CLKSTCTRL_DISABLE_AUTO 0x0
#define OMAP34XX_CLKSTCTRL_FORCE_SLEEP 0x1
{
u32 idcode;
u16 hawkeye;
- u8 rev;
+ u8 rev, package;
+ struct omap_die_id odi;
+ omap_get_die_id(&odi);
+ package = (odi.id_2 >> 16) & 0x3;
idcode = read_tap_reg(OMAP_TAP_IDCODE);
hawkeye = (idcode >> 12) & 0xffff;
rev = (idcode >> 28) & 0xff;
switch (rev) {
case 0:
default:
- omap_revision = DRA762_REV_ES1_0;
+ switch (package) {
+ case 0x2:
+ omap_revision = DRA762_ABZ_REV_ES1_0;
+ break;
+ case 0x3:
+ omap_revision = DRA762_ACD_REV_ES1_0;
+ break;
+ default:
+ omap_revision = DRA762_REV_ES1_0;
+ break;
+ }
break;
}
break;
{ }
};
-static int _setup_clkctrl_provider(struct device_node *np)
+static int __init _setup_clkctrl_provider(struct device_node *np)
{
const __be32 *addrp;
struct clkctrl_provider *provider;
return 0;
}
-static int _init_clkctrl_providers(void)
+static int __init _init_clkctrl_providers(void)
{
struct device_node *np;
int ret = 0;
/**
* struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data
* @module_offs: PRCM submodule offset from the start of the PRM/CM
- * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3)
- * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs
* @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3)
* @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit
- * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit
*
* @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST,
* WKEN, GRPSEL registers. In an ideal world, no extra information
*/
struct omap_hwmod_omap2_prcm {
s16 module_offs;
- u8 prcm_reg_id;
- u8 module_bit;
u8 idlest_reg_id;
u8 idlest_idle_bit;
- u8 idlest_stdby_bit;
};
/*
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP2420_EN_I2C1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP2420_ST_I2C1_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP2420_EN_I2C2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP2420_ST_I2C2_SHIFT,
},
.main_clk = "mailboxes_ick",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_MAILBOXES_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT,
.main_clk = "mcbsp1_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_MCBSP1_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
.main_clk = "mcbsp2_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_MCBSP2_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
.main_clk = "mmc_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP2420_EN_MMC_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP2420_ST_MMC_SHIFT,
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_HDQ_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_HDQ_SHIFT,
},
* to hwmod framework.
*/
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP2430_EN_I2CHS1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP2430_ST_I2CHS1_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP2430_EN_I2CHS2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP2430_ST_I2CHS2_SHIFT,
},
.main_clk = "gpio5_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 2,
- .module_bit = OMAP2430_EN_GPIO5_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 2,
.idlest_idle_bit = OMAP2430_ST_GPIO5_SHIFT,
.main_clk = "mailboxes_ick",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_MAILBOXES_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT,
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 2,
- .module_bit = OMAP2430_EN_MCSPI3_SHIFT,
.idlest_reg_id = 2,
.idlest_idle_bit = OMAP2430_ST_MCSPI3_SHIFT,
},
.main_clk = "usbhs_ick",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP2430_EN_USBHS_MASK,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP2430_ST_USBHS_SHIFT,
.main_clk = "mcbsp1_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_MCBSP1_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
.main_clk = "mcbsp2_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_MCBSP2_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
.main_clk = "mcbsp3_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP2430_EN_MCBSP3_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 2,
.idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT,
.main_clk = "mcbsp4_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP2430_EN_MCBSP4_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 2,
.idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT,
.main_clk = "mcbsp5_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP2430_EN_MCBSP5_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 2,
.idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT,
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 2,
- .module_bit = OMAP2430_EN_MMCHS1_SHIFT,
.idlest_reg_id = 2,
.idlest_idle_bit = OMAP2430_ST_MMCHS1_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 2,
- .module_bit = OMAP2430_EN_MMCHS2_SHIFT,
.idlest_reg_id = 2,
.idlest_idle_bit = OMAP2430_ST_MMCHS2_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_HDQ_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_HDQ_SHIFT,
},
.main_clk = "gpt1_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_GPT1_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
.main_clk = "gpt2_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_GPT2_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT,
.main_clk = "gpt3_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_GPT3_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT,
.main_clk = "gpt4_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_GPT4_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT,
.main_clk = "gpt5_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_GPT5_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT,
.main_clk = "gpt6_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_GPT6_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT,
.main_clk = "gpt7_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_GPT7_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT,
.main_clk = "gpt8_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_GPT8_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT,
.main_clk = "gpt9_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_GPT9_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT,
.main_clk = "gpt10_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_GPT10_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT,
.main_clk = "gpt11_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_GPT11_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT,
.main_clk = "gpt12_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_GPT12_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT,
.main_clk = "mpu_wdt_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_MPU_WDT_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT,
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_UART1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_EN_UART1_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_UART2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_EN_UART2_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 2,
- .module_bit = OMAP24XX_EN_UART3_SHIFT,
.idlest_reg_id = 2,
.idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT,
},
.main_clk = "dss1_fck", /* instead of dss_fck */
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_DSS1_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
- .idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,
},
},
.opt_clks = dss_opt_clks,
.main_clk = "dss1_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_DSS1_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
- .idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,
},
},
.flags = HWMOD_NO_IDLEST,
.main_clk = "dss1_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_DSS1_SHIFT,
.module_offs = CORE_MOD,
},
},
.main_clk = "dss_54m_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_DSS1_SHIFT,
.module_offs = CORE_MOD,
},
},
.main_clk = "gpios_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
.main_clk = "gpios_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
.main_clk = "gpios_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
.main_clk = "gpios_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_MCSPI1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_MCSPI1_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_EN_MCSPI2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_MCSPI2_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = WKUP_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP24XX_ST_32KSYNC_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_32KSYNC_SHIFT,
},
.flags = HWMOD_NO_IDLEST | DEBUG_OMAP_GPMC_HWMOD_FLAGS,
.prcm = {
.omap2 = {
- .prcm_reg_id = 3,
- .module_bit = OMAP24XX_EN_GPMC_MASK,
.module_offs = CORE_MOD,
},
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 4,
- .module_bit = OMAP24XX_EN_RNG_SHIFT,
.idlest_reg_id = 4,
.idlest_idle_bit = OMAP24XX_ST_RNG_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 4,
- .module_bit = OMAP24XX_EN_SHA_SHIFT,
.idlest_reg_id = 4,
.idlest_idle_bit = OMAP24XX_ST_SHA_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 4,
- .module_bit = OMAP24XX_EN_AES_SHIFT,
.idlest_reg_id = 4,
.idlest_idle_bit = OMAP24XX_ST_AES_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = OMAP3430_IVA2_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_IVA2_SHIFT,
},
.main_clk = "gpt1_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_GPT1_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT1_SHIFT,
.main_clk = "gpt2_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_GPT2_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT2_SHIFT,
.main_clk = "gpt3_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_GPT3_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT3_SHIFT,
.main_clk = "gpt4_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_GPT4_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT4_SHIFT,
.main_clk = "gpt5_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_GPT5_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT5_SHIFT,
.main_clk = "gpt6_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_GPT6_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT6_SHIFT,
.main_clk = "gpt7_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_GPT7_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT7_SHIFT,
.main_clk = "gpt8_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_GPT8_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT8_SHIFT,
.main_clk = "gpt9_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_GPT9_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT9_SHIFT,
.main_clk = "gpt10_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_GPT10_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT10_SHIFT,
.main_clk = "gpt11_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_GPT11_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT11_SHIFT,
.main_clk = "gpt12_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_GPT12_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT12_SHIFT,
.main_clk = "wdt2_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_WDT2_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_WDT2_SHIFT,
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_UART1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_EN_UART1_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_UART2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_EN_UART2_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = OMAP3430_PER_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_UART3_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_EN_UART3_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = OMAP3430_PER_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3630_EN_UART4_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3630_EN_UART4_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = AM35XX_EN_UART4_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = AM35XX_ST_UART4_SHIFT,
},
.main_clk = "dss1_alwon_fck", /* instead of dss_fck */
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_DSS1_SHIFT,
.module_offs = OMAP3430_DSS_MOD,
.idlest_reg_id = 1,
- .idlest_stdby_bit = OMAP3430ES1_ST_DSS_SHIFT,
},
},
.opt_clks = dss_opt_clks,
.main_clk = "dss1_alwon_fck", /* instead of dss_fck */
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_DSS1_SHIFT,
.module_offs = OMAP3430_DSS_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430ES2_ST_DSS_IDLE_SHIFT,
- .idlest_stdby_bit = OMAP3430ES2_ST_DSS_STDBY_SHIFT,
},
},
.opt_clks = dss_opt_clks,
.main_clk = "dss1_alwon_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_DSS1_SHIFT,
.module_offs = OMAP3430_DSS_MOD,
},
},
.main_clk = "dss1_alwon_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_DSS1_SHIFT,
.module_offs = OMAP3430_DSS_MOD,
},
},
.main_clk = "dss1_alwon_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_DSS1_SHIFT,
.module_offs = OMAP3430_DSS_MOD,
},
},
.main_clk = "dss_tv_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_DSS1_SHIFT,
.module_offs = OMAP3430_DSS_MOD,
},
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_I2C1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_I2C1_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_I2C2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_I2C2_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_I2C3_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_I2C3_SHIFT,
},
.opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks),
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_GPIO1_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPIO1_SHIFT,
.opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks),
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_GPIO2_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPIO2_SHIFT,
.opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks),
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_GPIO3_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPIO3_SHIFT,
.opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks),
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_GPIO4_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPIO4_SHIFT,
.opt_clks_cnt = ARRAY_SIZE(gpio5_opt_clks),
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_GPIO5_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPIO5_SHIFT,
.opt_clks_cnt = ARRAY_SIZE(gpio6_opt_clks),
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_GPIO6_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPIO6_SHIFT,
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_ST_SDMA_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_SDMA_SHIFT,
},
.main_clk = "mcbsp1_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_MCBSP1_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MCBSP1_SHIFT,
.main_clk = "mcbsp2_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_MCBSP2_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT,
.main_clk = "mcbsp3_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_MCBSP3_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT,
.main_clk = "mcbsp4_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_MCBSP4_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MCBSP4_SHIFT,
.main_clk = "mcbsp5_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_MCBSP5_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MCBSP5_SHIFT,
.main_clk = "sr1_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_SR1_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_EN_SR1_SHIFT,
.main_clk = "sr1_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_SR1_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_EN_SR1_SHIFT,
.main_clk = "sr2_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_SR2_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_EN_SR2_SHIFT,
.main_clk = "sr2_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_SR2_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_EN_SR2_SHIFT,
.main_clk = "mailboxes_ick",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_MAILBOXES_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MAILBOXES_SHIFT,
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_MCSPI1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MCSPI1_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_MCSPI2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MCSPI2_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_MCSPI3_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MCSPI3_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_MCSPI4_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MCSPI4_SHIFT,
},
.main_clk = "hsotgusb_ick",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_HSOTGUSB_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430ES2_ST_HSOTGUSB_IDLE_SHIFT,
- .idlest_stdby_bit = OMAP3430ES2_ST_HSOTGUSB_STDBY_SHIFT,
},
},
.class = &usbotg_class,
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_MMC1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MMC1_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_MMC1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MMC1_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_MMC2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MMC2_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_MMC2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MMC2_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_MMC3_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MMC3_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = OMAP3430ES2_USBHOST_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430ES2_EN_USBHOST1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430ES2_ST_USBHOST_IDLE_SHIFT,
- .idlest_stdby_bit = OMAP3430ES2_ST_USBHOST_STDBY_SHIFT,
},
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 3,
- .module_bit = OMAP3430ES2_EN_USBTLL_SHIFT,
.idlest_reg_id = 3,
.idlest_idle_bit = OMAP3430ES2_ST_USBTLL_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_HDQ_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_HDQ_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_SAD2D_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_SAD2D_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = WKUP_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_ST_32KSYNC_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_32KSYNC_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = OMAP3430_IVA2_MOD,
- .module_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_IVA2_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_SHA12_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_SHA12_SHIFT,
},
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_AES2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_AES2_SHIFT,
},
.main_clk = "ssi_ssr_fck",
.prcm = {
.omap2 = {
- .prcm_reg_id = 1,
- .module_bit = OMAP3430_EN_SSI_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430ES2_ST_SSI_IDLE_SHIFT,
NULL,
};
+static struct omap_hwmod_ocp_if *acd_76x_hwmod_ocp_ifs[] __initdata = {
+ NULL,
+};
+
static struct omap_hwmod_ocp_if *dra74x_hwmod_ocp_ifs[] __initdata = {
&dra7xx_l4_per3__usb_otg_ss4,
NULL,
NULL,
};
-static struct omap_hwmod_ocp_if *dra74x_dra72x_hwmod_ocp_ifs[] __initdata = {
+static struct omap_hwmod_ocp_if *rtc_hwmod_ocp_ifs[] __initdata = {
&dra7xx_l4_per3__rtcss,
NULL,
};
omap_hwmod_init();
ret = omap_hwmod_register_links(dra7xx_hwmod_ocp_ifs);
- if (!ret && soc_is_dra74x())
+ if (!ret && soc_is_dra74x()) {
ret = omap_hwmod_register_links(dra74x_hwmod_ocp_ifs);
- else if (!ret && soc_is_dra72x())
+ if (!ret)
+ ret = omap_hwmod_register_links(rtc_hwmod_ocp_ifs);
+ } else if (!ret && soc_is_dra72x()) {
ret = omap_hwmod_register_links(dra72x_hwmod_ocp_ifs);
- else if (!ret && soc_is_dra76x())
+ if (!ret && !of_machine_is_compatible("ti,dra718"))
+ ret = omap_hwmod_register_links(rtc_hwmod_ocp_ifs);
+ } else if (!ret && soc_is_dra76x()) {
ret = omap_hwmod_register_links(dra76x_hwmod_ocp_ifs);
+ if (!ret && soc_is_dra76x_acd()) {
+ ret = omap_hwmod_register_links(acd_76x_hwmod_ocp_ifs);
+ } else if (!ret && soc_is_dra76x_abz()) {
+ ret = omap_hwmod_register_links(rtc_hwmod_ocp_ifs);
+ }
+ }
+
if (!ret && omap_type() == OMAP2_DEVICE_TYPE_GP)
ret = omap_hwmod_register_links(dra7xx_gp_hwmod_ocp_ifs);
- /* now for the IPs available only in dra74 and dra72 */
- if (!ret && !of_machine_is_compatible("ti,dra718") && !soc_is_dra76x())
- ret = omap_hwmod_register_links(dra74x_dra72x_hwmod_ocp_ifs);
-
return ret;
}
return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
}
+#define GET_DRA_PACKAGE (omap_rev() & 0xff)
+
+#define IS_DRA_SUBCLASS_PACKAGE(subclass, package, id) \
+static inline int is_dra ##subclass ##_ ##package (void) \
+{ \
+ return (is_dra ##subclass () && GET_DRA_PACKAGE == id) ? 1 : 0; \
+}
+
IS_OMAP_CLASS(24xx, 0x24)
IS_OMAP_CLASS(34xx, 0x34)
IS_OMAP_CLASS(44xx, 0x44)
IS_AM_SUBCLASS(335x, 0x335)
IS_AM_SUBCLASS(437x, 0x437)
IS_DRA_SUBCLASS(76x, 0x76)
+IS_DRA_SUBCLASS_PACKAGE(76x, abz, 2)
+IS_DRA_SUBCLASS_PACKAGE(76x, acd, 3)
IS_DRA_SUBCLASS(75x, 0x75)
IS_DRA_SUBCLASS(72x, 0x72)
#if defined(CONFIG_SOC_DRA7XX)
#undef soc_is_dra7xx
#undef soc_is_dra76x
+#undef soc_is_dra76x_abz
+#undef soc_is_dra76x_acd
#undef soc_is_dra74x
#undef soc_is_dra72x
#define soc_is_dra7xx() is_dra7xx()
#define soc_is_dra76x() is_dra76x()
+#define soc_is_dra76x_abz() is_dra76x_abz()
+#define soc_is_dra76x_acd() is_dra76x_acd()
#define soc_is_dra74x() is_dra75x()
#define soc_is_dra72x() is_dra72x()
#endif
#define DRA7XX_CLASS 0x07000000
#define DRA762_REV_ES1_0 (DRA7XX_CLASS | (0x62 << 16) | (0x10 << 8))
+#define DRA762_ABZ_REV_ES1_0 (DRA762_REV_ES1_0 | (2 << 0))
+#define DRA762_ACD_REV_ES1_0 (DRA762_REV_ES1_0 | (3 << 0))
#define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8))
#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8))
#define DRA752_REV_ES2_0 (DRA7XX_CLASS | (0x52 << 16) | (0x20 << 8))
config ARCH_LUBBOCK
bool "Intel DBPXA250 Development Platform (aka Lubbock)"
+ select GPIO_REG
select PXA25x
select SA1111
#include <linux/mtd/partitions.h>
#include <linux/types.h>
#include <linux/platform_data/pcf857x.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/physmap.h>
#include <linux/regulator/max1586.h>
#include <linux/i2c.h>
#include <linux/platform_data/pca953x.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <linux/mfd/da903x.h>
#include <linux/regulator/machine.h>
#include <mach/hardware.h>
#include <asm/mach/arch.h>
#include <linux/i2c.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <asm/io.h>
#include "pxa27x.h"
#include <linux/platform_device.h>
#include <linux/pwm.h>
#include <linux/pwm_backlight.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <linux/gpio.h>
#include <linux/backlight.h>
#include <linux/i2c.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <linux/io.h>
#include <linux/regulator/machine.h>
#include <linux/spi/spi.h>
static inline void corgi_init_spi(void) {}
#endif
-static struct mtd_partition sharpsl_nand_partitions[] = {
- {
- .name = "System Area",
- .offset = 0,
- .size = 7 * 1024 * 1024,
- },
- {
- .name = "Root Filesystem",
- .offset = 7 * 1024 * 1024,
- .size = 25 * 1024 * 1024,
- },
- {
- .name = "Home Filesystem",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- },
-};
-
static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
static struct nand_bbt_descr sharpsl_bbt = {
.pattern = scan_ff_pattern
};
+static const char * const probes[] = {
+ "cmdlinepart",
+ "ofpart",
+ "sharpslpart",
+ NULL,
+};
+
static struct sharpsl_nand_platform_data sharpsl_nand_platform_data = {
.badblock_pattern = &sharpsl_bbt,
- .partitions = sharpsl_nand_partitions,
- .nr_partitions = ARRAY_SIZE(sharpsl_nand_partitions),
+ .part_parsers = probes,
};
static struct resource sharpsl_nand_resources[] = {
platform_scoop_config = &corgi_pcmcia_config;
- if (machine_is_husky())
- sharpsl_nand_partitions[1].size = 53 * 1024 * 1024;
-
platform_add_devices(devices, ARRAY_SIZE(devices));
regulator_has_full_constraints();
#include <linux/mtd/partitions.h>
#include <linux/sm501.h>
#include <linux/smsc911x.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/spi/pxa2xx_spi.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include "udc.h"
#include <linux/platform_data/usb-pxa3xx-ulpi.h>
void __init pxa_register_device(struct platform_device *dev, void *data);
void __init pxa2xx_set_dmac_info(int nb_channels, int nb_requestors);
+
+struct i2c_pxa_platform_data;
+extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info);
+#ifdef CONFIG_PXA27x
+extern void pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info);
+#endif
+#ifdef CONFIG_PXA3xx
+extern void pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info);
+#endif
#include <linux/apm-emulation.h>
#include <linux/i2c.h>
#include <linux/platform_data/pca953x.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <linux/regulator/userspace-consumer.h>
#include <asm/mach-types.h>
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/leds-lp3944.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <linux/spi/spi.h>
#include <linux/spi/pxa2xx_spi.h>
#include <linux/usb/gpio_vbus.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <linux/leds.h>
#include <linux/mfd/da903x.h>
#include <linux/platform_data/max732x.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <asm/types.h>
#include <asm/setup.h>
#include <asm/mach/irq.h>
#include "pxa300.h"
+#include "devices.h"
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/keypad-pxa27x.h>
*/
#include <linux/clkdev.h>
#include <linux/gpio.h>
+#include <linux/gpio/gpio-reg.h>
#include <linux/gpio/machine.h>
#include <linux/module.h>
#include <linux/kernel.h>
};
#define LUB_HEXLED __LUB_REG(LUBBOCK_FPGA_PHYS + 0x010)
-#define LUB_MISC_WR __LUB_REG(LUBBOCK_FPGA_PHYS + 0x080)
void lubbock_set_hexled(uint32_t value)
{
LUB_HEXLED = value;
}
+static struct gpio_chip *lubbock_misc_wr_gc;
+
void lubbock_set_misc_wr(unsigned int mask, unsigned int set)
{
- unsigned long flags;
-
- local_irq_save(flags);
- LUB_MISC_WR = (LUB_MISC_WR & ~mask) | (set & mask);
- local_irq_restore(flags);
+ unsigned long m = mask, v = set;
+ lubbock_misc_wr_gc->set_multiple(lubbock_misc_wr_gc, &m, &v);
}
EXPORT_SYMBOL(lubbock_set_misc_wr);
local_irq_save(flags);
if (mode & IR_SIRMODE) {
- LUB_MISC_WR &= ~(1 << 4);
+ lubbock_set_misc_wr(BIT(4), 0);
} else if (mode & IR_FIRMODE) {
- LUB_MISC_WR |= 1 << 4;
+ lubbock_set_misc_wr(BIT(4), BIT(4));
}
pxa2xx_transceiver_mode(dev, mode);
local_irq_restore(flags);
pxa2xx_mfp_config(ARRAY_AND_SIZE(lubbock_pin_config));
+ lubbock_misc_wr_gc = gpio_reg_init(NULL, (void *)&LUB_MISC_WR,
+ -1, 16, "lubbock", 0, LUB_MISC_WR,
+ NULL, NULL, NULL);
+ if (IS_ERR(lubbock_misc_wr_gc)) {
+ pr_err("Lubbock: unable to register lubbock GPIOs: %ld\n",
+ PTR_ERR(lubbock_misc_wr_gc));
+ lubbock_misc_wr_gc = NULL;
+ }
+
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
#include <linux/regulator/gpio-regulator.h>
#include <linux/regulator/machine.h>
#include <linux/usb/gpio_vbus.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <linux/pwm.h>
#include <linux/pwm_backlight.h>
#include <linux/smc91x.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <linux/slab.h>
#include <linux/leds.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/max1586.h>
#include <linux/slab.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <linux/serial_8250.h>
#include <linux/dm9000.h>
#include <linux/gpio.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <linux/platform_data/mtd-nand-pxa3xx.h>
#include <linux/power_supply.h>
#include <linux/usb/gpio_vbus.h>
#include <linux/regulator/max1586.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <linux/irq.h>
#include <linux/platform_device.h>
#include <linux/i2c.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <linux/pwm.h>
#include <linux/pwm_backlight.h>
#include <linux/mtd/physmap.h>
#include <linux/gpio.h>
#include <linux/i2c.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <linux/regulator/machine.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
.lcd_conn = LCD_COLOR_TFT_16BPP,
};
-static struct mtd_partition sharpsl_nand_partitions[] = {
- {
- .name = "System Area",
- .offset = 0,
- .size = 7 * 1024 * 1024,
- },
- {
- .name = "Root Filesystem",
- .offset = 7 * 1024 * 1024,
- .size = 22 * 1024 * 1024,
- },
- {
- .name = "Home Filesystem",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- },
-};
-
static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
static struct nand_bbt_descr sharpsl_bbt = {
.pattern = scan_ff_pattern
};
+static const char * const probes[] = {
+ "cmdlinepart",
+ "ofpart",
+ "sharpslpart",
+ NULL,
+};
+
static struct sharpsl_nand_platform_data sharpsl_nand_platform_data = {
.badblock_pattern = &sharpsl_bbt,
- .partitions = sharpsl_nand_partitions,
- .nr_partitions = ARRAY_SIZE(sharpsl_nand_partitions),
+ .part_parsers = probes,
};
static struct resource sharpsl_nand_resources[] = {
#include <linux/syscore_ops.h>
#include <linux/io.h>
#include <linux/irq.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <asm/mach/map.h>
#include <mach/hardware.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/syscore_ops.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <asm/mach/map.h>
#include <asm/suspend.h>
#include <linux/pwm.h>
#include <linux/pwm_backlight.h>
#include <linux/i2c.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi_gpio.h>
#include <linux/lis3lv02d.h>
#include <linux/delay.h>
#include <linux/fb.h>
#include <linux/i2c.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <linux/smc91x.h>
#include <linux/mfd/da903x.h>
#include <linux/mtd/mtd.h>
#include <linux/gpio.h>
#include <linux/leds.h>
#include <linux/i2c.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <linux/platform_data/pca953x.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
* NAND Flash
******************************************************************************/
#if defined(CONFIG_MTD_NAND_SHARPSL) || defined(CONFIG_MTD_NAND_SHARPSL_MODULE)
-static struct mtd_partition spitz_nand_partitions[] = {
- {
- .name = "System Area",
- .offset = 0,
- .size = 7 * 1024 * 1024,
- }, {
- .name = "Root Filesystem",
- .offset = 7 * 1024 * 1024,
- }, {
- .name = "Home Filesystem",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- },
-};
-
static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
static struct nand_bbt_descr spitz_nand_bbt = {
.free = akita_ooblayout_free,
};
+static const char * const probes[] = {
+ "cmdlinepart",
+ "ofpart",
+ "sharpslpart",
+ NULL,
+};
+
static struct sharpsl_nand_platform_data spitz_nand_pdata = {
.badblock_pattern = &spitz_nand_bbt,
- .partitions = spitz_nand_partitions,
- .nr_partitions = ARRAY_SIZE(spitz_nand_partitions),
+ .part_parsers = probes,
};
static struct resource spitz_nand_resources[] = {
static void __init spitz_nand_init(void)
{
- if (machine_is_spitz()) {
- spitz_nand_partitions[1].size = 5 * 1024 * 1024;
- } else if (machine_is_akita()) {
- spitz_nand_partitions[1].size = 58 * 1024 * 1024;
- spitz_nand_bbt.len = 1;
- spitz_nand_pdata.ecc_layout = &akita_ooblayout_ops;
- } else if (machine_is_borzoi()) {
- spitz_nand_partitions[1].size = 32 * 1024 * 1024;
+ if (machine_is_akita() || machine_is_borzoi()) {
spitz_nand_bbt.len = 1;
spitz_nand_pdata.ecc_layout = &akita_ooblayout_ops;
}
#include <linux/mtd/plat-ram.h>
#include <linux/mtd/partitions.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <linux/platform_data/pcf857x.h>
#include <linux/platform_data/at24.h>
#include <linux/smc91x.h>
},
};
module_platform_driver(tosa_bt_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Dmitry Baryshkov");
+MODULE_DESCRIPTION("Bluetooth built-in chip control");
#include <linux/spi/spi.h>
#include <linux/spi/pxa2xx_spi.h>
#include <linux/input/matrix_keypad.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <linux/usb/gpio_vbus.h>
#include <linux/reboot.h>
#include <linux/memblock.h>
return 0;
}
-static struct mtd_partition tosa_nand_partition[] = {
- {
- .name = "smf",
- .offset = 0,
- .size = 7 * 1024 * 1024,
- },
- {
- .name = "root",
- .offset = MTDPART_OFS_APPEND,
- .size = 28 * 1024 * 1024,
- },
- {
- .name = "home",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- },
-};
-
static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
static struct nand_bbt_descr tosa_tc6393xb_nand_bbt = {
.pattern = scan_ff_pattern
};
+static const char * const probes[] = {
+ "cmdlinepart",
+ "ofpart",
+ "sharpslpart",
+ NULL,
+};
+
static struct tmio_nand_data tosa_tc6393xb_nand_config = {
- .num_partitions = ARRAY_SIZE(tosa_nand_partition),
- .partition = tosa_nand_partition,
.badblock_pattern = &tosa_tc6393xb_nand_bbt,
+ .part_parsers = probes,
};
static int tosa_tc6393xb_setup(struct platform_device *dev)
#include <linux/mtd/physmap.h>
#include <linux/mtd/partitions.h>
#include <linux/regulator/machine.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <asm/types.h>
#include <asm/setup.h>
#include <linux/jiffies.h>
#include <linux/i2c-gpio.h>
#include <linux/gpio/machine.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <linux/serial_8250.h>
#include <linux/smc91x.h>
#include <linux/pwm.h>
#include <linux/ata_platform.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/max1586.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <linux/platform_device.h>
#include <linux/i2c.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <linux/smc91x.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <mach/smemc.h>
#include "generic.h"
+#include "devices.h"
#define XCEP_ETH_PHYS (PXA_CS3_PHYS + 0x00000300)
#define XCEP_ETH_PHYS_END (PXA_CS3_PHYS + 0x000fffff)
#include <linux/gpio_keys.h>
#include <linux/delay.h>
#include <linux/regulator/machine.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/i2c.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <linux/platform_data/pca953x.h>
#include <linux/apm-emulation.h>
#include <linux/can/platform/mcp251x.h>
#include <asm/mach/map.h>
#include "pxa27x.h"
+#include "devices.h"
#include <mach/regs-uart.h>
#include <linux/platform_data/usb-ohci-pxa27x.h>
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/i2c.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <linux/platform_data/pca953x.h>
#include <linux/gpio.h>
#include "pxa300.h"
+#include "devices.h"
#include "zylonite.h"
#include "generic.h"
-# arch/arm/mach-s3c24xx/Kconfig
+# SPDX-License-Identifier: GPL-2.0
#
# Copyright (c) 2012 Samsung Electronics Co., Ltd.
# http://www.samsung.com/
#
# Copyright 2007 Simtec Electronics
-#
-# Licensed under GPLv2
if ARCH_S3C24XX
-# arch/arm/mach-s3c24xx/Makefile
+# SPDX-License-Identifier: GPL-2.0
#
# Copyright (c) 2012 Samsung Electronics Co., Ltd.
# http://www.samsung.com/
#
# Copyright 2007 Simtec Electronics
-#
-# Licensed under GPLv2
# core
+# SPDX-License-Identifier: GPL-2.0
+
ifeq ($(CONFIG_PM_H1940),y)
zreladdr-y += 0x30108000
params_phys-y := 0x30100100
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2005 Simtec Electronics
* http://www.simtec.co.uk/products/
* ANUBIS - CPLD control constants
* ANUBIS - IRQ Number definitions
* ANUBIS - Memory map definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __MACH_S3C24XX_ANUBIS_H
#define __MACH_S3C24XX_ANUBIS_H __FILE__
-/* linux/arch/arm/mach-s3c2410/bast-ide.c
- *
- * Copyright 2007 Simtec Electronics
- * http://www.simtec.co.uk/products/EB2410ITX/
- * http://armlinux.simtec.co.uk/
- * Ben Dooks <ben@simtec.co.uk>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2007 Simtec Electronics
+// http://www.simtec.co.uk/products/EB2410ITX/
+// http://armlinux.simtec.co.uk/
+// Ben Dooks <ben@simtec.co.uk>
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c2410/bast-irq.c
- *
- * Copyright 2003-2005 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * http://www.simtec.co.uk/products/EB2410ITX/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Copyright 2003-2005 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// http://www.simtec.co.uk/products/EB2410ITX/
#include <linux/init.h>
#include <linux/module.h>
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2003-2004 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
* BAST - CPLD control constants
* BAST - IRQ Number definitions
* BAST - Memory map definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __MACH_S3C24XX_BAST_H
#define __MACH_S3C24XX_BAST_H __FILE__
-/* linux/arch/arm/plat-s3c24xx/common-smdk.c
- *
- * Copyright (c) 2006 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * Common code for SMDK2410 and SMDK2440 boards
- *
- * http://www.fluff.org/ben/smdk2440/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2006 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// Common code for SMDK2410 and SMDK2440 boards
+//
+// http://www.fluff.org/ben/smdk2440/
#include <linux/kernel.h>
#include <linux/types.h>
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2006 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
* Common code for SMDK2410 and SMDK2440 boards
*
* http://www.fluff.org/ben/smdk2440/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
extern void smdk_machine_init(void);
-/* linux/arch/arm/plat-s3c24xx/cpu.c
- *
- * Copyright (c) 2004-2005 Simtec Electronics
- * http://www.simtec.co.uk/products/SWLINUX/
- * Ben Dooks <ben@simtec.co.uk>
- *
- * Common code for S3C24XX machines
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Copyright (c) 2004-2005 Simtec Electronics
+// http://www.simtec.co.uk/products/SWLINUX/
+// Ben Dooks <ben@simtec.co.uk>
+//
+// Common code for S3C24XX machines
#include <linux/dma-mapping.h>
#include <linux/init.h>
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2012 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Common Header for S3C24XX SoCs
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#ifndef __ARCH_ARM_MACH_S3C24XX_COMMON_H
-/*
- * Copyright (c) 2009 Simtec Electronics
- * http://armlinux.simtec.co.uk/
- * Ben Dooks <ben@simtec.co.uk>
- *
- * S3C24XX CPU Frequency scaling - utils for S3C2410/S3C2440/S3C2442
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2009 Simtec Electronics
+// http://armlinux.simtec.co.uk/
+// Ben Dooks <ben@simtec.co.uk>
+//
+// S3C24XX CPU Frequency scaling - utils for S3C2410/S3C2440/S3C2442
#include <linux/kernel.h>
#include <linux/errno.h>
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright 2010 Samsung Electronics Co., Ltd.
* Pawel Osciak <p.osciak@samsung.com>
*
* Samsung framebuffer driver core functions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#ifndef __ASM_PLAT_FB_CORE_H
#define __ASM_PLAT_FB_CORE_H __FILE__
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* GTA02 header
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __MACH_S3C24XX_GTA02_H
#define __MACH_S3C24XX_GTA02_H __FILE__
-/*
- * arch/arm/mach-s3c2410/h1940-bluetooth.c
- * Copyright (c) Arnaud Patard <arnaud.patard@rtp-net.org>
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive for
- * more details.
- *
- * S3C2410 bluetooth "driver"
- *
- */
+// SPDX-License-Identifier: GPL-1.0
+//
+// Copyright (c) Arnaud Patard <arnaud.patard@rtp-net.org>
+//
+// S3C2410 bluetooth "driver"
#include <linux/module.h>
#include <linux/platform_device.h>
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright 2006 Ben Dooks <ben-linux@fluff.org>
*
* Ben Dooks <ben@simtec.co.uk>
*
* iPAQ H1940 series definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __MACH_S3C24XX_H1940_H
#define __MACH_S3C24XX_H1940_H __FILE__
-/* arch/arm/mach-s3c2410/include/mach/dma.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (C) 2003-2006 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Samsung S3C24XX DMA support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H __FILE__
+/* SPDX-License-Identifier: GPL-2.0 */
#include <plat/fb-s3c2410.h>
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2008 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
* S3C2410 - GPIO lib support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
/* some boards require extra gpio capacity to support external
* devices that need GPIO.
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2003 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* S3C2410 - hardware
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
-/* arch/arm/mach-s3c2410/include/mach/irqs.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2003-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __ASM_ARCH_IRQS_H
-/* arch/arm/mach-s3c2410/include/mach/map.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2003 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* S3C2410 - Memory map definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __ASM_ARCH_MAP_H
#define __ASM_ARCH_MAP_H
-/* linux/arch/arm/mach-s3c2410/include/pm-core.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright 2008 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
* http://armlinux.simtec.co.uk/
*
* S3C24xx - PM core support for arch/arm/plat-s3c/pm.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
+
#include <linux/delay.h>
#include <linux/io.h>
-/* arch/arm/mach-s3c2410/include/mach/regs-clock.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2003-2006 Simtec Electronics <linux@simtec.co.uk>
* http://armlinux.simtec.co.uk/
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
* S3C2410 clock register definitions
-*/
+ */
#ifndef __ASM_ARM_REGS_CLOCK
#define __ASM_ARM_REGS_CLOCK
-/* arch/arm/mach-s3c2410/include/mach/regs-gpio.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2003-2004 Simtec Electronics <linux@simtec.co.uk>
* http://www.simtec.co.uk/products/SWLINUX/
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
* S3C2410 GPIO register definitions
-*/
+ */
#ifndef __ASM_ARCH_REGS_GPIO_H
-/* arch/arm/mach-s3c2410/include/mach/regs-irq.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
* http://www.simtec.co.uk/products/SWLINUX/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef ___ASM_ARCH_REGS_IRQ_H
-/* arch/arm/mach-s3c2410/include/mach/regs-lcd.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
* http://www.simtec.co.uk/products/SWLINUX/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
+ */
#ifndef ___ASM_ARCH_REGS_LCD_H
#define ___ASM_ARCH_REGS_LCD_H
-/* arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2007 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
* http://armlinux.simtec.co.uk/
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
* S3C2443 clock register definitions
-*/
+ */
#ifndef __ASM_ARM_REGS_S3C2443_CLOCK
#define __ASM_ARM_REGS_S3C2443_CLOCK
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2011 Heiko Stuebner <heiko@sntech.de>
*
* Samsung RTC Controller core functions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __RTC_CORE_H
#define __RTC_CORE_H __FILE__
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2008 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
* http://armlinux.simtec.co.uk/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#ifndef __ARCH_ARM_MACH_S3C24XX_S3C2412_H
-/*
- * Copyright (c) 2006-2009 Simtec Electronics
- * http://armlinux.simtec.co.uk/
- * Ben Dooks <ben@simtec.co.uk>
- *
- * S3C24XX CPU Frequency scaling - IO timing for S3C2410/S3C2440/S3C2442
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2006-2009 Simtec Electronics
+// http://armlinux.simtec.co.uk/
+// Ben Dooks <ben@simtec.co.uk>
+//
+// S3C24XX CPU Frequency scaling - IO timing for S3C2410/S3C2440/S3C2442
#include <linux/init.h>
#include <linux/kernel.h>
-/*
- * Copyright (c) 2006-2008 Simtec Electronics
- * http://armlinux.simtec.co.uk/
- * Ben Dooks <ben@simtec.co.uk>
- *
- * S3C2412/S3C2443 (PL093 based) IO timing support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2006-2008 Simtec Electronics
+// http://armlinux.simtec.co.uk/
+// Ben Dooks <ben@simtec.co.uk>
+//
+// S3C2412/S3C2443 (PL093 based) IO timing support
#include <linux/init.h>
#include <linux/module.h>
-/* linux/arch/arm/plat-s3c24xx/irq-om.c
- *
- * Copyright (c) 2003-2004 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * S3C24XX - IRQ PM code
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2003-2004 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
+//
+// S3C24XX - IRQ PM code
#include <linux/init.h>
#include <linux/module.h>
-/* linux/arch/arm/mach-s3c2410/mach-amlm5900.c
- *
- * linux/arch/arm/mach-s3c2410/mach-amlm5900.c
- *
- * Copyright (c) 2006 American Microsystems Limited
- * David Anders <danders@amltd.com>
-
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * @History:
- * derived from linux/arch/arm/mach-s3c2410/mach-bast.c, written by
- * Ben Dooks <ben@simtec.co.uk>
- *
- ***********************************************************************/
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Copyright (c) 2006 American Microsystems Limited
+// David Anders <danders@amltd.com>
+//
+// @History:
+// derived from linux/arch/arm/mach-s3c2410/mach-bast.c, written by
+// Ben Dooks <ben@simtec.co.uk>
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c2440/mach-anubis.c
- *
- * Copyright 2003-2009 Simtec Electronics
- * http://armlinux.simtec.co.uk/
- * Ben Dooks <ben@simtec.co.uk>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2003-2009 Simtec Electronics
+// http://armlinux.simtec.co.uk/
+// Ben Dooks <ben@simtec.co.uk>
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c2440/mach-at2440evb.c
- *
- * Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com>
- * Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk>
- * and modifications by SBZ <sbz@spgui.org> and
- * Weibing <http://weibing.blogbus.com>
- *
- * For product information, visit http://www.arm.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com>
+// Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk>
+// and modifications by SBZ <sbz@spgui.org> and
+// Weibing <http://weibing.blogbus.com>
+//
+// For product information, visit http://www.arm.com/
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c2410/mach-bast.c
- *
- * Copyright 2003-2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * http://www.simtec.co.uk/products/EB2410ITX/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2003-2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// http://www.simtec.co.uk/products/EB2410ITX/
#include <linux/kernel.h>
#include <linux/types.h>
-/*
- * S3C2442 Machine Support for Openmoko GTA02 / FreeRunner.
- *
- * Copyright (C) 2006-2009 by Openmoko, Inc.
- * Authors: Harald Welte <laforge@openmoko.org>
- * Andy Green <andy@openmoko.org>
- * Werner Almesberger <werner@openmoko.org>
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
+// SPDX-License-Identifier: GPL-2.0+
+//
+// S3C2442 Machine Support for Openmoko GTA02 / FreeRunner.
+//
+// Copyright (C) 2006-2009 by Openmoko, Inc.
+// Authors: Harald Welte <laforge@openmoko.org>
+// Andy Green <andy@openmoko.org>
+// Werner Almesberger <werner@openmoko.org>
+// All rights reserved.
#include <linux/kernel.h>
#include <linux/types.h>
-/*
- * Copyright (c) 2003-2005 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * http://www.handhelds.org/projects/h1940.html
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2003-2005 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// http://www.handhelds.org/projects/h1940.html
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c2410/mach-jive.c
- *
- * Copyright 2007 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * http://armlinux.simtec.co.uk/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2007 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// http://armlinux.simtec.co.uk/
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c2440/mach-mini2440.c
- *
- * Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com>
- * Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk>
- * and modifications by SBZ <sbz@spgui.org> and
- * Weibing <http://weibing.blogbus.com> and
- * Michel Pollet <buserror@gmail.com>
- *
- * For product information, visit http://code.google.com/p/mini2440/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com>
+// Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk>
+// and modifications by SBZ <sbz@spgui.org> and
+// Weibing <http://weibing.blogbus.com> and
+// Michel Pollet <buserror@gmail.com>
+//
+// For product information, visit http://code.google.com/p/mini2440/
#include <linux/kernel.h>
#include <linux/types.h>
-/* Machine specific code for the Acer n30, Acer N35, Navman PiN 570,
- * Yakumo AlphaX and Airis NC05 PDAs.
- *
- * Copyright (c) 2003-2005 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * Copyright (c) 2005-2008 Christer Weinigel <christer@weinigel.se>
- *
- * There is a wiki with more information about the n30 port at
- * http://handhelds.org/moin/moin.cgi/AcerN30Documentation .
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Machine specific code for the Acer n30, Acer N35, Navman PiN 570,
+// Yakumo AlphaX and Airis NC05 PDAs.
+//
+// Copyright (c) 2003-2005 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// Copyright (c) 2005-2008 Christer Weinigel <christer@weinigel.se>
+//
+// There is a wiki with more information about the n30 port at
+// http://handhelds.org/moin/moin.cgi/AcerN30Documentation .
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c2440/mach-nexcoder.c
- *
- * Copyright (c) 2004 Nex Vision
- * Guillaume GOURAT <guillaume.gourat@nexvision.tv>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Modifications:
- * 15-10-2004 GG Created initial version
- * 12-03-2005 BJD Updated for release
- */
+// SPDX-License-Identifier: GPL-2.0
+// linux/arch/arm/mach-s3c2440/mach-nexcoder.c
+//
+// Copyright (c) 2004 Nex Vision
+// Guillaume GOURAT <guillaume.gourat@nexvision.tv>
+//
+// Modifications:
+// 15-10-2004 GG Created initial version
+// 12-03-2005 BJD Updated for release
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c2440/mach-osiris-dvs.c
- *
- * Copyright (c) 2009 Simtec Electronics
- * http://armlinux.simtec.co.uk/
- * Ben Dooks <ben@simtec.co.uk>
- *
- * Simtec Osiris Dynamic Voltage Scaling support.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2009 Simtec Electronics
+// http://armlinux.simtec.co.uk/
+// Ben Dooks <ben@simtec.co.uk>
+//
+// Simtec Osiris Dynamic Voltage Scaling support.
#include <linux/kernel.h>
#include <linux/module.h>
-/*
- * Copyright (c) 2005-2008 Simtec Electronics
- * http://armlinux.simtec.co.uk/
- * Ben Dooks <ben@simtec.co.uk>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2005-2008 Simtec Electronics
+// http://armlinux.simtec.co.uk/
+// Ben Dooks <ben@simtec.co.uk>
#include <linux/kernel.h>
#include <linux/types.h>
-/*
- *
- * Copyright (c) 2004 Nex Vision
- * Guillaume GOURAT <guillaume.gourat@nexvision.fr>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2004 Nex Vision
+// Guillaume GOURAT <guillaume.gourat@nexvision.fr>
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c2410/mach-qt2410.c
- *
- * Copyright (C) 2006 by OpenMoko, Inc.
- * Author: Harald Welte <laforge@openmoko.org>
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Copyright (C) 2006 by OpenMoko, Inc.
+// Author: Harald Welte <laforge@openmoko.org>
+// All rights reserved.
#include <linux/kernel.h>
#include <linux/types.h>
-/*
- * Copyright (c) 2006-2009 Victor Chukhantsev, Denis Grigoriev,
- * Copyright (c) 2007-2010 Vasily Khoruzhick
- *
- * based on smdk2440 written by Ben Dooks
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2006-2009 Victor Chukhantsev, Denis Grigoriev,
+// Copyright (c) 2007-2010 Vasily Khoruzhick
+//
+// based on smdk2440 written by Ben Dooks
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c2440/mach-rx3715.c
- *
- * Copyright (c) 2003-2004 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * http://www.handhelds.org/projects/rx3715.html
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2003-2004 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// http://www.handhelds.org/projects/rx3715.html
#include <linux/kernel.h>
#include <linux/types.h>
-/*
- * Samsung's S3C2416 flattened device tree enabled machine
- *
- * Copyright (c) 2012 Heiko Stuebner <heiko@sntech.de>
- *
- * based on mach-exynos/mach-exynos4-dt.c
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- * Copyright (c) 2010-2011 Linaro Ltd.
- * www.linaro.org
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Samsung's S3C2416 flattened device tree enabled machine
+//
+// Copyright (c) 2012 Heiko Stuebner <heiko@sntech.de>
+//
+// based on mach-exynos/mach-exynos4-dt.c
+//
+// Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+// http://www.samsung.com
+// Copyright (c) 2010-2011 Linaro Ltd.
+// www.linaro.org
#include <linux/clocksource.h>
#include <linux/irqchip.h>
-/* linux/arch/arm/mach-s3c2410/mach-smdk2410.c
- *
- * linux/arch/arm/mach-s3c2410/mach-smdk2410.c
- *
- * Copyright (C) 2004 by FS Forth-Systeme GmbH
- * All rights reserved.
- *
- * @Author: Jonas Dietsche
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * @History:
- * derived from linux/arch/arm/mach-s3c2410/mach-bast.c, written by
- * Ben Dooks <ben@simtec.co.uk>
- *
- ***********************************************************************/
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Copyright (C) 2004 by FS Forth-Systeme GmbH
+// All rights reserved.
+//
+// @Author: Jonas Dietsche
+//
+// @History:
+// derived from linux/arch/arm/mach-s3c2410/mach-bast.c, written by
+// Ben Dooks <ben@simtec.co.uk>
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c2412/mach-smdk2413.c
- *
- * Copyright (c) 2006 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * Thanks to Dimity Andric (TomTom) and Steven Ryu (Samsung) for the
- * loans of SMDK2413 to work with.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2006 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// Thanks to Dimity Andric (TomTom) and Steven Ryu (Samsung) for the
+// loans of SMDK2413 to work with.
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c2416/mach-hanlin_v3c.c
- *
- * Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>,
- * as part of OpenInkpot project
- * Copyright (c) 2009 Promwad Innovation Company
- * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>,
+// as part of OpenInkpot project
+// Copyright (c) 2009 Promwad Innovation Company
+// Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c2440/mach-smdk2440.c
- *
- * Copyright (c) 2004-2005 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * http://www.fluff.org/ben/smdk2440/
- *
- * Thanks to Dimity Andric and TomTom for the loan of an SMDK2440.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
+// SPDX-License-Identifier: GPL-2.0
+// linux/arch/arm/mach-s3c2440/mach-smdk2440.c
+//
+// Copyright (c) 2004-2005 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// http://www.fluff.org/ben/smdk2440/
+//
+// Thanks to Dimity Andric and TomTom for the loan of an SMDK2440.
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c2443/mach-smdk2443.c
- *
- * Copyright (c) 2007 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * http://www.fluff.org/ben/smdk2443/
- *
- * Thanks to Samsung for the loan of an SMDK2443
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2007 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// http://www.fluff.org/ben/smdk2443/
+//
+// Thanks to Samsung for the loan of an SMDK2443
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c2410/mach-tct_hammer.c
- *
- * Copyright (c) 2007 TinCanTools
- * David Anders <danders@amltd.com>
-
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * @History:
- * derived from linux/arch/arm/mach-s3c2410/mach-bast.c, written by
- * Ben Dooks <ben@simtec.co.uk>
- *
- ***********************************************************************/
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Copyright (c) 2007 TinCanTools
+// David Anders <danders@amltd.com>
+//
+// @History:
+// derived from linux/arch/arm/mach-s3c2410/mach-bast.c, written by
+// Ben Dooks <ben@simtec.co.uk>
#include <linux/kernel.h>
#include <linux/types.h>
-/*
- * Copyright (c) 2003-2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * Machine support for Thorcom VR1000 board. Designed for Thorcom by
- * Simtec Electronics, http://www.simtec.co.uk/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2003-2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// Machine support for Thorcom VR1000 board. Designed for Thorcom by
+// Simtec Electronics, http://www.simtec.co.uk/
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c2412/mach-vstms.c
- *
- * (C) 2006 Thomas Gleixner <tglx@linutronix.de>
- *
- * Derived from mach-smdk2413.c - (C) 2006 Simtec Electronics
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// (C) 2006 Thomas Gleixner <tglx@linutronix.de>
+//
+// Derived from mach-smdk2413.c - (C) 2006 Simtec Electronics
#include <linux/kernel.h>
#include <linux/types.h>
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
*
* S3C - Nand Controller core functions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __ASM_ARCH_NAND_CORE_H
#define __ASM_ARCH_NAND_CORE_H __FILE__
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright 2005 Simtec Electronics
* http://www.simtec.co.uk/products/
*
* OSIRIS - CPLD control constants
* OSIRIS - Memory map definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __MACH_S3C24XX_OSIRIS_H
#define __MACH_S3C24XX_OSIRIS_H __FILE__
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* (c) 2005 Guillaume GOURAT / NexVision
* guillaume.gourat@nexvision.fr
*
* NexVision OTOM board memory map definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
/*
* ok, we've used up to 0x01300000, now we need to find space for the
-/*
- * Copyright (c) 2006-2007 Simtec Electronics
- * http://armlinux.simtec.co.uk/
- * Ben Dooks <ben@simtec.co.uk>
- * Vincent Sanders <vince@arm.linux.org.uk>
- *
- * S3C2410 CPU PLL tables
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Copyright (c) 2006-2007 Simtec Electronics
+// http://armlinux.simtec.co.uk/
+// Ben Dooks <ben@simtec.co.uk>
+// Vincent Sanders <vince@arm.linux.org.uk>
+//
+// S3C2410 CPU PLL tables
#include <linux/types.h>
#include <linux/kernel.h>
-/*
- * Copyright (c) 2006-2007 Simtec Electronics
- * http://armlinux.simtec.co.uk/
- * Ben Dooks <ben@simtec.co.uk>
- * Vincent Sanders <vince@arm.linux.org.uk>
- *
- * S3C2440/S3C2442 CPU PLL tables (12MHz Crystal)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2006-2007 Simtec Electronics
+// http://armlinux.simtec.co.uk/
+// Ben Dooks <ben@simtec.co.uk>
+// Vincent Sanders <vince@arm.linux.org.uk>
+//
+// S3C2440/S3C2442 CPU PLL tables (12MHz Crystal)
#include <linux/types.h>
#include <linux/kernel.h>
-/*
- * Copyright (c) 2006-2008 Simtec Electronics
- * http://armlinux.simtec.co.uk/
- * Ben Dooks <ben@simtec.co.uk>
- * Vincent Sanders <vince@arm.linux.org.uk>
- *
- * S3C2440/S3C2442 CPU PLL tables (16.93444MHz Crystal)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2006-2008 Simtec Electronics
+// http://armlinux.simtec.co.uk/
+// Ben Dooks <ben@simtec.co.uk>
+// Vincent Sanders <vince@arm.linux.org.uk>
+//
+// S3C2440/S3C2442 CPU PLL tables (16.93444MHz Crystal)
#include <linux/types.h>
#include <linux/kernel.h>
-/* linux/arch/arm/mach-s3c2410/pm-h1940.S
- *
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
* Copyright (c) 2006 Ben Dooks <ben-linux@fluff.org>
*
* H1940 Suspend to RAM
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
+ */
#include <linux/linkage.h>
#include <asm/assembler.h>
-/* linux/arch/arm/mach-s3c2410/pm.c
- *
- * Copyright (c) 2006 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * S3C2410 (and compatible) Power Manager (Suspend-To-RAM) support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Copyright (c) 2006 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// S3C2410 (and compatible) Power Manager (Suspend-To-RAM) support
#include <linux/init.h>
#include <linux/suspend.h>
-/* linux/arch/arm/mach-s3c2412/pm.c
- *
- * Copyright (c) 2006 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * http://armlinux.simtec.co.uk/.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2006 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// http://armlinux.simtec.co.uk/.
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c2416/pm.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * S3C2416 - PM support (Based on Ben Dooks' S3C2412 PM support)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2010 Samsung Electronics Co., Ltd.
+// http://www.samsung.com
+//
+// S3C2416 - PM support (Based on Ben Dooks' S3C2412 PM support)
#include <linux/device.h>
#include <linux/syscore_ops.h>
-/* linux/arch/arm/plat-s3c24xx/pm.c
- *
- * Copyright (c) 2004-2006 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * S3C24XX Power Manager (Suspend-To-RAM) support
- *
- * See Documentation/arm/Samsung-S3C24XX/Suspend.txt for more information
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- * Parts based on arch/arm/mach-pxa/pm.c
- *
- * Thanks to Dimitry Andric for debugging
-*/
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Copyright (c) 2004-2006 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// S3C24XX Power Manager (Suspend-To-RAM) support
+//
+// See Documentation/arm/Samsung-S3C24XX/Suspend.txt for more information
+//
+// Parts based on arch/arm/mach-pxa/pm.c
+//
+// Thanks to Dimitry Andric for debugging
#include <linux/init.h>
#include <linux/suspend.h>
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk>
* http://www.simtec.co.uk/products/SWLINUX/
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
* S3C2440/S3C2412 Signal Drive Strength Control
-*/
+ */
#ifndef __ASM_ARCH_REGS_DSC_H
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk>
* http://www.simtec.co.uk/products/SWLINUX/
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
* S3C2410 Memory Control register definitions
*/
-/* linux/arch/arm/mach-s3c2410/s3c2410.c
- *
- * Copyright (c) 2003-2005 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * http://www.simtec.co.uk/products/EB2410ITX/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2003-2005 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// http://www.simtec.co.uk/products/EB2410ITX/
#include <linux/kernel.h>
#include <linux/types.h>
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2003-2006 Simtec Electronics <linux@simtec.co.uk>
* http://armlinux.simtec.co.uk/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#ifndef __ARCH_ARM_MACH_S3C24XX_S3C2412_POWER_H
-/*
- * Copyright (c) 2006 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * http://armlinux.simtec.co.uk/.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2006 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// http://armlinux.simtec.co.uk/.
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c2416/s3c2416.c
- *
- * Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>,
- * as part of OpenInkpot project
- * Copyright (c) 2009 Promwad Innovation Company
- * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
- *
- * Samsung S3C2416 Mobile CPU support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>,
+// as part of OpenInkpot project
+// Copyright (c) 2009 Promwad Innovation Company
+// Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
+//
+// Samsung S3C2416 Mobile CPU support
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c2440/s3c2440.c
- *
- * Copyright (c) 2004-2006 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * Samsung S3C2440 Mobile CPU support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2004-2006 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// Samsung S3C2440 Mobile CPU support
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c2442/s3c2442.c
- *
- * Copyright (c) 2004-2005 Simtec Electronics
- * http://armlinux.simtec.co.uk/
- * Ben Dooks <ben@simtec.co.uk>
- *
- * S3C2442 core and lock support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Copyright (c) 2004-2005 Simtec Electronics
+// http://armlinux.simtec.co.uk/
+// Ben Dooks <ben@simtec.co.uk>
+//
+// S3C2442 core and lock support
#include <linux/init.h>
#include <linux/module.h>
-/* linux/arch/arm/mach-s3c2443/s3c2443.c
- *
- * Copyright (c) 2007 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * Samsung S3C2443 Mobile CPU support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2007 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// Samsung S3C2443 Mobile CPU support
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/plat-s3c24xx/s3c244x.c
- *
- * Copyright (c) 2004-2006 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * Samsung S3C2440 and S3C2442 Mobile CPU support (not S3C2443)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2004-2006 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// Samsung S3C2440 and S3C2442 Mobile CPU support (not S3C2443)
#include <linux/kernel.h>
#include <linux/types.h>
-/*
- * Copyright (C) 2012 Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
- *
- * Helper functions for S3C24XX/S3C64XX SoC series CAMIF driver
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (C) 2012 Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
+//
+// Helper functions for S3C24XX/S3C64XX SoC series CAMIF driver
#include <linux/gpio.h>
#include <plat/gpio-cfg.h>
-/* linux/arch/arm/plat-s3c24xx/setup-i2c.c
- *
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * S3C24XX Base setup for i2c device
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// S3C24XX Base setup for i2c device
#include <linux/kernel.h>
#include <linux/gpio.h>
-/* linux/arch/arm/plat-s3c2416/setup-sdhci-gpio.c
- *
- * Copyright 2010 Promwad Innovation Company
- * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
- *
- * S3C2416 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
- *
- * Based on mach-s3c64xx/setup-sdhci-gpio.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2010 Promwad Innovation Company
+// Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
+//
+// S3C2416 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
+//
+// Based on mach-s3c64xx/setup-sdhci-gpio.c
#include <linux/kernel.h>
#include <linux/types.h>
-/*
- * HS-SPI device setup for S3C2443/S3C2416
- *
- * Copyright (C) 2011 Samsung Electronics Ltd.
- * http://www.samsung.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// HS-SPI device setup for S3C2443/S3C2416
+//
+// Copyright (C) 2011 Samsung Electronics Ltd.
+// http://www.samsung.com/
#include <linux/gpio.h>
#include <linux/platform_device.h>
-/* linux/arch/arm/plat-s3c24xx/setup-ts.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * Based on S3C24XX setup for i2c device
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2010 Samsung Electronics Co., Ltd.
+// http://www.samsung.com/
+//
+// Based on S3C24XX setup for i2c device
#include <linux/kernel.h>
#include <linux/gpio.h>
-/* linux/arch/arm/plat-s3c24xx/simtec-audio.c
- *
- * Copyright (c) 2009 Simtec Electronics
- * http://armlinux.simtec.co.uk/
- * Ben Dooks <ben@simtec.co.uk>
- *
- * Audio setup for various Simtec S3C24XX implementations
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2009 Simtec Electronics
+// http://armlinux.simtec.co.uk/
+// Ben Dooks <ben@simtec.co.uk>
+//
+// Audio setup for various Simtec S3C24XX implementations
#include <linux/kernel.h>
#include <linux/interrupt.h>
-/* linux/arch/arm/mach-s3c2410/nor-simtec.c
- *
- * Copyright (c) 2008 Simtec Electronics
- * http://armlinux.simtec.co.uk/
- * Ben Dooks <ben@simtec.co.uk>
- *
- * Simtec NOR mapping
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2008 Simtec Electronics
+// http://armlinux.simtec.co.uk/
+// Ben Dooks <ben@simtec.co.uk>
+//
+// Simtec NOR mapping
#include <linux/module.h>
#include <linux/types.h>
-/* linux/arch/arm/plat-s3c24xx/pm-simtec.c
- *
- * Copyright 2004 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * http://armlinux.simtec.co.uk/
- *
- * Power Management helpers for Simtec S3C24XX implementations
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2004 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// http://armlinux.simtec.co.uk/
+//
+// Power Management helpers for Simtec S3C24XX implementations
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c2410/usb-simtec.c
- *
- * Copyright 2004-2005 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * http://www.simtec.co.uk/products/EB2410ITX/
- *
- * Simtec BAST and Thorcom VR1000 USB port support functions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2004-2005 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// http://www.simtec.co.uk/products/EB2410ITX/
+//
+// Simtec BAST and Thorcom VR1000 USB port support functions
#define DEBUG
-/* linux/arch/arm/mach-s3c2410/nor-simtec.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2008 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
* Simtec common functions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
struct s3c24xx_audio_simtec_pdata;
-/* linux/arch/arm/mach-s3c2410/sleep.S
- *
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
* Copyright (c) 2004 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Based on PXA/SA1100 sleep code by:
* Nicolas Pitre, (c) 2002 Monta Vista Software Inc
* Cliff Brake, (c) 2001
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
+ */
#include <linux/linkage.h>
#include <linux/serial_s3c.h>
-/* linux/arch/arm/mach-s3c2412/sleep.S
- *
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
* Copyright (c) 2007 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* S3C2412 Power Manager low-level sleep support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
+ */
#include <linux/linkage.h>
#include <asm/assembler.h>
-/* linux/arch/arm/plat-s3c24xx/sleep.S
- *
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
* Copyright (c) 2004 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Based on PXA/SA1100 sleep code by:
* Nicolas Pitre, (c) 2002 Monta Vista Software Inc
* Cliff Brake, (c) 2001
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
+ */
#include <linux/linkage.h>
#include <linux/serial_s3c.h>
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2012 Heiko Stuebner <heiko@sntech.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#ifndef __PLAT_S3C_SPI_CORE_H
-
-/* arch/arm/mach-s3c2410/include/mach/vr1000-cpld.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2003 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* VR1000 - CPLD control constants
* Machine VR1000 - IRQ Number definitions
* Machine VR1000 - Memory map definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __MACH_S3C24XX_VR1000_H
#define __MACH_S3C24XX_VR1000_H __FILE__
+# SPDX-License-Identifier: GPL-2.0
+#
# Copyright 2008 Openmoko, Inc.
# Simtec Electronics, Ben Dooks <ben@simtec.co.uk>
-#
-# Licensed under GPLv2
+
menuconfig ARCH_S3C64XX
bool "Samsung S3C64XX"
depends on ARCH_MULTI_V6
-# arch/arm/mach-s3c64xx/Makefile
+# SPDX-License-Identifier: GPL-2.0
#
# Copyright 2008 Openmoko, Inc.
# Copyright 2008 Simtec Electronics
-#
-# Licensed under GPLv2
ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include -I$(srctree)/arch/arm/plat-samsung/include
asflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include -I$(srctree)/arch/arm/plat-samsung/include
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Samsung CF-ATA Controller core functions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __ASM_PLAT_ATA_CORE_H
#define __ASM_PLAT_ATA_CORE_H __FILE__
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#ifndef __ASM_PLAT_BACKLIGHT_H
-/*
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * Common Codes for S3C64XX machines
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2011 Samsung Electronics Co., Ltd.
+// http://www.samsung.com
+//
+// Copyright 2008 Openmoko, Inc.
+// Copyright 2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
+//
+// Common Codes for S3C64XX machines
/*
* NOTE: Code in this file is not used when booting with Device Tree support.
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
* http://armlinux.simtec.co.uk/
*
* Common Header for S3C64XX machines
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#ifndef __ARCH_ARM_MACH_S3C64XX_COMMON_H
-/* linux/arch/arm/mach-s3c64xx/cpuidle.c
- *
- * Copyright (c) 2011 Wolfson Microelectronics, plc
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2011 Wolfson Microelectronics, plc
+// Copyright (c) 2011 Samsung Electronics Co., Ltd.
+// http://www.samsung.com
#include <linux/kernel.h>
#include <linux/init.h>
+/* SPDX-License-Identifier: GPL-2.0 */
/* Cragganmore 6410 shared definitions
*
* Copyright 2011 Wolfson Microelectronics plc
* Mark Brown <broonie@opensource.wolfsonmicro.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#ifndef MACH_CRAG6410_H
-/* linux/arch/arm/plat-s3c/dev-audio.c
- *
- * Copyright 2009 Wolfson Microelectronics
- * Mark Brown <broonie@opensource.wolfsonmicro.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2009 Wolfson Microelectronics
+// Mark Brown <broonie@opensource.wolfsonmicro.com>
#include <linux/kernel.h>
#include <linux/string.h>
-/*
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * Common infrastructure for PWM Backlight for Samsung boards
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2011 Samsung Electronics Co., Ltd.
+// http://www.samsung.com
+//
+// Common infrastructure for PWM Backlight for Samsung boards
#include <linux/gpio.h>
#include <linux/platform_device.h>
-/* linux/arch/arm/plat-s3c64xx/dev-uart.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * Base S3C64XX UART resource and device definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2008 Openmoko, Inc.
+// Copyright 2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
+//
+// Base S3C64XX UART resource and device definitions
#include <linux/kernel.h>
#include <linux/types.h>
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* S3C6400 - GPIO lib support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef GPIO_SAMSUNG_S3C64XX_H
#define GPIO_SAMSUNG_S3C64XX_H
+/* SPDX-License-Identifier: GPL-2.0 */
/* linux/arch/arm/mach-s3c6400/include/mach/hardware.h
*
* Copyright 2008 Openmoko, Inc.
-/* linux/arch/arm/mach-s3c6400/include/mach/map.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
* S3C64XX - Memory map definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __ASM_ARCH_MAP_H
#define __ASM_ARCH_MAP_H __FILE__
-/* linux/arch/arm/mach-s3c64xx/include/mach/pm-core.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
* http://armlinux.simtec.co.uk/
*
* S3C64XX - PM core support for arch/arm/plat-s3c/pm.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#ifndef __MACH_S3C64XX_PM_CORE_H
-/* arch/arm/plat-s3c64xx/include/plat/regs-clock.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
* http://armlinux.simtec.co.uk/
*
* S3C64XX clock register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __PLAT_REGS_CLOCK_H
#define __PLAT_REGS_CLOCK_H __FILE__
-/* linux/arch/arm/mach-s3c6400/include/mach/regs-irq.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
* S3C64XX - IRQ register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __ASM_ARCH_REGS_IRQ_H
#define __ASM_ARCH_REGS_IRQ_H __FILE__
-/* arch/arm/plat-s3c64xx/irq-pm.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * S3C64XX - Interrupt handling Power Management
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2008 Openmoko, Inc.
+// Copyright 2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
+//
+// S3C64XX - Interrupt handling Power Management
/*
* NOTE: Code in this file is not used when booting with Device Tree support.
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2010 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Header file for Samsung SoC UART IRQ demux for S3C64XX and later
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
struct s3c_uart_irq {
void __iomem *regs;
-/* linux/arch/arm/mach-s3c64xx/mach-anw6410.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- * Copyright 2009 Kwangwoo Lee
- * Kwangwoo Lee <kwangwoo.lee@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2008 Openmoko, Inc.
+// Copyright 2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
+// Copyright 2009 Kwangwoo Lee
+// Kwangwoo Lee <kwangwoo.lee@gmail.com>
#include <linux/kernel.h>
#include <linux/types.h>
-/* Speyside modules for Cragganmore - board data probing
- *
- * Copyright 2011 Wolfson Microelectronics plc
- * Mark Brown <broonie@opensource.wolfsonmicro.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Speyside modules for Cragganmore - board data probing
+//
+// Copyright 2011 Wolfson Microelectronics plc
+// Mark Brown <broonie@opensource.wolfsonmicro.com>
#include <linux/export.h>
#include <linux/interrupt.h>
-/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
- *
- * Copyright 2011 Wolfson Microelectronics plc
- * Mark Brown <broonie@opensource.wolfsonmicro.com>
- *
- * Copyright 2011 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2011 Wolfson Microelectronics plc
+// Mark Brown <broonie@opensource.wolfsonmicro.com>
+//
+// Copyright 2011 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
#include <linux/kernel.h>
#include <linux/list.h>
-/* mach-hmt.c - Platform code for Airgoo HMT
- *
- * Copyright 2009 Peter Korsgaard <jacmet@sunsite.dk>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// mach-hmt.c - Platform code for Airgoo HMT
+//
+// Copyright 2009 Peter Korsgaard <jacmet@sunsite.dk>
#include <linux/kernel.h>
#include <linux/init.h>
-/* linux/arch/arm/mach-s3c64xx/mach-mini6410.c
- *
- * Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
+// Copyright 2008 Openmoko, Inc.
+// Copyright 2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
#include <linux/init.h>
#include <linux/interrupt.h>
-/*
- * linux/arch/arm/mach-s3c64xx/mach-ncp.c
- *
- * Copyright (C) 2008-2009 Samsung Electronics
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (C) 2008-2009 Samsung Electronics
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c64xx/mach-real6410.c
- *
- * Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
+// Copyright 2008 Openmoko, Inc.
+// Copyright 2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
#include <linux/init.h>
#include <linux/interrupt.h>
-/*
- * Samsung's S3C64XX flattened device tree enabled machine
- *
- * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Samsung's S3C64XX flattened device tree enabled machine
+//
+// Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-/*
- * linux/arch/arm/mach-s3c64xx/mach-smartq.c
- *
- * Copyright (C) 2010 Maurus Cuelenaere
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (C) 2010 Maurus Cuelenaere
#include <linux/delay.h>
#include <linux/fb.h>
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* linux/arch/arm/mach-s3c64xx/mach-smartq.h
*
* Copyright (C) 2010 Maurus Cuelenaere
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
*/
#ifndef __MACH_SMARTQ_H
-/*
- * linux/arch/arm/mach-s3c64xx/mach-smartq5.c
- *
- * Copyright (C) 2010 Maurus Cuelenaere
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (C) 2010 Maurus Cuelenaere
#include <linux/fb.h>
#include <linux/gpio.h>
-/*
- * linux/arch/arm/mach-s3c64xx/mach-smartq7.c
- *
- * Copyright (C) 2010 Maurus Cuelenaere
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (C) 2010 Maurus Cuelenaere
#include <linux/fb.h>
#include <linux/gpio.h>
-/* linux/arch/arm/mach-s3c64xx/mach-smdk6400.c
- *
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2008 Openmoko, Inc.
+// Copyright 2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
#include <linux/kernel.h>
#include <linux/types.h>
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2010 Samsung Electronics
* Kyungmin Park <kyungmin.park@samsung.com>
* Marek Szyprowski <m.szyprowski@samsung.com>
*
* Samsung OneNAD Controller core functions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __ASM_ARCH_ONENAND_CORE_H
#define __ASM_ARCH_ONENAND_CORE_H __FILE__
-/*
- * Samsung's S3C64XX generic DMA support using amba-pl08x driver.
- *
- * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Samsung's S3C64XX generic DMA support using amba-pl08x driver.
+//
+// Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
#include <linux/kernel.h>
#include <linux/amba/bus.h>
-/* linux/arch/arm/plat-s3c64xx/pm.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * S3C64XX CPU PM support.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2008 Openmoko, Inc.
+// Copyright 2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
+//
+// S3C64XX CPU PM support.
#include <linux/init.h>
#include <linux/suspend.h>
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* S3C64XX - modem block registers
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __MACH_S3C64XX_REGS_MODEM_H
#define __MACH_S3C64XX_REGS_MODEM_H __FILE__
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright 2009 Andy Green <andy@warmcat.com>
*
* S3C64XX SROM definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __MACH_S3C64XX_REGS_SROM_H
#define __MACH_S3C64XX_REGS_SROM_H __FILE__
-/* linux/arch/arm/mach-s3c64xx/cpu.c
- *
- * Copyright 2009 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2009 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
/*
* NOTE: Code in this file is not used when booting with Device Tree support.
-/* linux/arch/arm/mach-s3c64xx/s3c6410.c
- *
- * Copyright 2008 Simtec Electronics
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2008 Simtec Electronics
+// Copyright 2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
/*
* NOTE: Code in this file is not used when booting with Device Tree support.
-/* linux/arch/arm/plat-s3c64xx/setup-fb-24bpp.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * Base S3C64XX setup information for 24bpp LCD framebuffer
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2008 Openmoko, Inc.
+// Copyright 2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
+//
+// Base S3C64XX setup information for 24bpp LCD framebuffer
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/plat-s3c64xx/setup-i2c0.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * Base S3C64XX I2C bus 0 gpio configuration
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2008 Openmoko, Inc.
+// Copyright 2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
+//
+// Base S3C64XX I2C bus 0 gpio configuration
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/plat-s3c64xx/setup-i2c1.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * Base S3C64XX I2C bus 1 gpio configuration
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2008 Openmoko, Inc.
+// Copyright 2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
+//
+// Base S3C64XX I2C bus 1 gpio configuration
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c64xx/setup-ide.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * S3C64XX setup information for IDE
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2010 Samsung Electronics Co., Ltd.
+// http://www.samsung.com/
+//
+// S3C64XX setup information for IDE
#include <linux/kernel.h>
#include <linux/gpio.h>
-/* linux/arch/arm/mach-s3c64xx/setup-keypad.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * GPIO configuration for S3C64XX KeyPad device
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2010 Samsung Electronics Co., Ltd.
+// http://www.samsung.com/
+//
+// GPIO configuration for S3C64XX KeyPad device
#include <linux/gpio.h>
#include <plat/gpio-cfg.h>
-/* linux/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c
- *
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * S3C64XX - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
+//
+// S3C64XX - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
#include <linux/kernel.h>
#include <linux/types.h>
-/* linux/arch/arm/mach-s3c64xx/setup-spi.c
- *
- * Copyright (C) 2011 Samsung Electronics Ltd.
- * http://www.samsung.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (C) 2011 Samsung Electronics Ltd.
+// http://www.samsung.com/
#include <linux/gpio.h>
#include <plat/gpio-cfg.h>
-/*
- * Copyright (C) 2011 Samsung Electronics Co.Ltd
- * Author: Joonyoung Shim <jy0922.shim@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Copyright (C) 2011 Samsung Electronics Co.Ltd
+// Author: Joonyoung Shim <jy0922.shim@samsung.com>
#include <linux/clk.h>
#include <linux/delay.h>
+/* SPDX-License-Identifier: GPL-2.0 */
/* linux/arch/arm/plat-s3c64xx/sleep.S
*
* Copyright 2008 Openmoko, Inc.
* http://armlinux.simtec.co.uk/
*
* S3C64XX CPU sleep code
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#include <linux/linkage.h>
#include <asm/assembler.h>
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2008 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* S3C2410 - System define for arch_reset() function
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __PLAT_SAMSUNG_WATCHDOG_RESET_H
#define __PLAT_SAMSUNG_WATCHDOG_RESET_H
-# arch/arm/mach-s5pv210/Kconfig
+# SPDX-License-Identifier: GPL-2.0
#
# Copyright (c) 2010 Samsung Electronics Co., Ltd.
# http://www.samsung.com/
-#
-# Licensed under GPLv2
# Configuration options for the S5PV210/S5PC110
-# arch/arm/mach-s5pv210/Makefile
+# SPDX-License-Identifier: GPL-2.0
#
# Copyright (c) 2010 Samsung Electronics Co., Ltd.
# http://www.samsung.com/
-#
-# Licensed under GPLv2
ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/arch/arm/plat-samsung/include
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Common Header for S5PV210 machines
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#ifndef __ARCH_ARM_MACH_S5PV210_COMMON_H
-/* linux/arch/arm/mach-s5pv210/pm.c
- *
- * Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * S5PV210 - Power Management support
- *
- * Based on arch/arm/mach-s3c2410/pm.c
- * Copyright (c) 2006 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
+// http://www.samsung.com
+//
+// S5PV210 - Power Management support
+//
+// Based on arch/arm/mach-s3c2410/pm.c
+// Copyright (c) 2006 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
#include <linux/init.h>
#include <linux/suspend.h>
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
*
* S5PV210 - Clock register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __ASM_ARCH_REGS_CLOCK_H
#define __ASM_ARCH_REGS_CLOCK_H __FILE__
-/*
- * Samsung's S5PC110/S5PV210 flattened device tree enabled machine.
- *
- * Copyright (c) 2013-2014 Samsung Electronics Co., Ltd.
- * Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
- * Tomasz Figa <t.figa@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Samsung's S5PC110/S5PV210 flattened device tree enabled machine.
+//
+// Copyright (c) 2013-2014 Samsung Electronics Co., Ltd.
+// Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
+// Tomasz Figa <t.figa@samsung.com>
#include <linux/of_fdt.h>
#include <linux/of_platform.h>
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.
* http://www.samsung.com
* S5PV210 Sleep Code
* Based on S3C64XX sleep code by:
* Ben Dooks, (c) 2008 Simtec Electronics
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
*/
#include <linux/linkage.h>
-# arch/arm/plat-samsung/Kconfig
+# SPDX-License-Identifier: GPL-2.0
#
# Copyright 2009 Simtec Electronics
-#
-# Licensed under GPLv2
config PLAT_SAMSUNG
bool
-# arch/arm/plat-samsung/Makefile
+# SPDX-License-Identifier: GPL-2.0
#
# Copyright 2009 Simtec Electronics
-#
-# Licensed under GPLv2
ccflags-$(CONFIG_ARCH_S3C64XX) := -I$(srctree)/arch/arm/mach-s3c64xx/include
ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/$(src)/include
-/* arch/arm/plat-samsung/adc.c
- *
- * Copyright (c) 2008 Simtec Electronics
- * http://armlinux.simtec.co.uk/
- * Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
- *
- * Samsung ADC device core
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License.
-*/
+// SPDX-License-Identifier: GPL-1.0+
+//
+// Copyright (c) 2008 Simtec Electronics
+// http://armlinux.simtec.co.uk/
+// Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
+//
+// Samsung ADC device core
#include <linux/module.h>
#include <linux/kernel.h>
-/* linux/arch/arm/plat-samsung/cpu.c
- *
- * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * Samsung CPU Support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
+// http://www.samsung.com
+//
+// Samsung CPU Support
#include <linux/module.h>
#include <linux/kernel.h>
-/* linux/arch/arm/plat-samsung/dev-uart.c
- * originally from arch/arm/plat-s3c24xx/devs.c
- *x
- * Copyright (c) 2004 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * Base S3C24XX platform device definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// originally from arch/arm/plat-s3c24xx/devs.c
+//
+// Copyright (c) 2004 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// Base S3C24XX platform device definitions
#include <linux/kernel.h>
#include <linux/platform_device.h>
-/* linux/arch/arm/plat-samsung/devs.c
- *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * Base SAMSUNG platform device definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2011 Samsung Electronics Co., Ltd.
+// http://www.samsung.com
+//
+// Base SAMSUNG platform device definitions
#include <linux/kernel.h>
#include <linux/types.h>
-/*
- * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * SAMSUNG - GPIOlib support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
+// http://www.samsung.com/
+//
+// Copyright 2008 Openmoko, Inc.
+// Copyright 2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
+//
+// SAMSUNG - GPIOlib support
#include <linux/kernel.h>
#include <linux/irq.h>
-/* linux/arch/arm/plat-samsung/include/plat/adc-core.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
*
* Samsung ADC Controller core functions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __ASM_PLAT_ADC_CORE_H
#define __ASM_PLAT_ADC_CORE_H __FILE__
-/* arch/arm/plat-samsung/include/plat/adc.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2008 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
* S3C ADC driver information
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __ASM_PLAT_ADC_H
#define __ASM_PLAT_ADC_H __FILE__
-/* arch/arm/plat-samsung/include/plat/cpu-freq-core.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2006-2009 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
* S3C CPU frequency scaling support - core support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#include <plat/cpu-freq.h>
-/* arch/arm/plat-samsung/include/plat/cpu-freq.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2006-2007 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
* S3C CPU frequency scaling support - driver and board
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#include <linux/cpufreq.h>
-/* linux/arch/arm/plat-samsung/include/plat/cpu.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
*
* Ben Dooks <ben@simtec.co.uk>
*
* Header file for Samsung CPU support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
/* todo - fix when rmk changes iodescs to use `void __iomem *` */
-/* arch/arm/plat-samsung/include/plat/devs.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Ben Dooks <ben@simtec.co.uk>
*
* Header file for s3c2410 standard platform devices
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __PLAT_DEVS_H
#define __PLAT_DEVS_H __FILE__
-/* arch/arm/plat-samsung/include/plat/fb-s3c2410.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2004 Arnaud Patard <arnaud.patard@rtp-net.org>
*
* Inspired by pxafb.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#ifndef __ASM_PLAT_FB_S3C2410_H
-/* arch/arm/plat-samsung/include/plat/fb.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
* S3C - FB platform data definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __PLAT_S3C_FB_H
#define __PLAT_S3C_FB_H __FILE__
-/* linux/arch/arm/plat-samsung/include/plat/gpio-cfg-helper.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
* Samsung Platform - GPIO pin configuration helper definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
/* This is meant for core cpu support, machine or other driver files
* should not be including this header.
-/* linux/arch/arm/plat-s3c/include/plat/gpio-cfg.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
* S3C Platform - GPIO pin configuration
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
/* This file contains the necessary definitions to get the basic gpio
* pin configuration done such as setting a pin to input or output or
-/* linux/arch/arm/plat-s3c/include/plat/gpio-core.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright 2008 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
* S3C Platform - GPIO core
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __PLAT_SAMSUNG_GPIO_CORE_H
#define __PLAT_SAMSUNG_GPIO_CORE_H
-/* arch/arm/mach-s3c2410/include/mach/iic-core.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* S3C - I2C Controller core functions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __ASM_ARCH_IIC_CORE_H
#define __ASM_ARCH_IIC_CORE_H __FILE__
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Samsung Platform - Keypad platform data definitions
*
* Copyright (C) 2010 Samsung Electronics Co.Ltd
* Author: Joonyoung Shim <jy0922.shim@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
*/
#ifndef __PLAT_SAMSUNG_KEYPAD_H
-/* linux/include/asm-arm/plat-s3c/map.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright 2003, 2007 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
* S3C - Memory map definitions (virtual addresses)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __ASM_PLAT_MAP_H
#define __ASM_PLAT_MAP_H __FILE__
-/* linux/arch/arm/plat-samsung/include/plat/map-s3c.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2008 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* S3C24XX - Memory map definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __ASM_PLAT_MAP_S3C_H
#define __ASM_PLAT_MAP_S3C_H __FILE__
-/* linux/arch/arm/plat-samsung/include/plat/map-s5p.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
*
* S5P - Memory map definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __ASM_PLAT_MAP_S5P_H
#define __ASM_PLAT_MAP_S5P_H __FILE__
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2013 Samsung Electronics Co., Ltd.
* Tomasz Figa <t.figa@samsung.com>
* Copyright (c) 2004 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Written by Ben Dooks, <ben@simtec.co.uk>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __PLAT_SAMSUNG_PM_COMMON_H
#define __PLAT_SAMSUNG_PM_COMMON_H __FILE__
-/* arch/arm/plat-samsung/include/plat/pm.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2004 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Written by Ben Dooks, <ben@simtec.co.uk>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
/* s3c_pm_init
*
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright 2013 Tomasz Figa <tomasz.figa@gmail.com>
*
* Samsung PWM controller platform data helpers.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_PWM_CORE_H
-/* arch/arm/mach-s3c2410/include/mach/regs-adc.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2004 Shannon Holland <holland@loser.net>
*
- * This program is free software; yosu can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
* S3C2410 ADC registers
-*/
+ */
#ifndef __ASM_ARCH_REGS_ADC_H
#define __ASM_ARCH_REGS_ADC_H "regs-adc.h"
-/* arch/arm/plat-s3c/include/plat/regs-irqtype.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright 2008 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
* http://armlinux.simtec.co.uk/
*
* S3C - IRQ detection types.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
/* values for S3C2410_EXTINT0/1/2 and other cpus in the series, including
-/* arch/arm/plat-samsung/include/plat/regs-spi.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2004 Fetron GmbH
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
* S3C2410 SPI register definition
-*/
+ */
#ifndef __ASM_ARCH_REGS_SPI_H
#define __ASM_ARCH_REGS_SPI_H
-/* arch/arm/plat-samsung/include/plat/regs-udc.h
- *
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
* Copyright (C) 2004 Herbert Poetzl <herbert@13thfloor.at>
- *
- * This include file is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
-*/
+ */
#ifndef __ASM_ARCH_REGS_UDC_H
#define __ASM_ARCH_REGS_UDC_H
-/* linux/arch/arm/plat-samsung/include/plat/samsung-time.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright 2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
*
* Header file for samsung s3c and s5p time support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __ASM_PLAT_SAMSUNG_TIME_H
#define __ASM_PLAT_SAMSUNG_TIME_H __FILE__
-/* linux/arch/arm/plat-samsung/include/plat/sdhci.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright (c) 2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Ben Dooks <ben@simtec.co.uk>
*
* S3C Platform - SDHCI (HSMMC) platform data definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ */
#ifndef __PLAT_S3C_SDHCI_H
#define __PLAT_S3C_SDHCI_H __FILE__
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2011 Samsung Electronics Co.Ltd
* Author: Joonyoung Shim <jy0922.shim@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
*/
#ifndef __PLAT_SAMSUNG_USB_PHY_H
-/* arch/arm/plat-samsung/include/plat/wakeup-mask.h
- *
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
* Copyright 2010 Ben Dooks <ben-linux@fluff.org>
*
* Support for wakeup mask interrupts on newer SoCs
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
+ */
#ifndef __PLAT_WAKEUP_MASK_H
#define __PLAT_WAKEUP_MASK_H __file__
-/* linux/arch/arm/plat-s3c/init.c
- *
- * Copyright (c) 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * S3C series CPU initialisation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
+//
+// S3C series CPU initialisation
/*
* NOTE: Code in this file is not used on S3C64xx when booting with
-/* linux/arch/arm/plat-samsung/platformdata.c
- *
- * Copyright 2010 Ben Dooks <ben-linux <at> fluff.org>
- *
- * Helper for platform data setting
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2010 Ben Dooks <ben-linux <at> fluff.org>
+//
+// Helper for platform data setting
#include <linux/kernel.h>
#include <linux/slab.h>
-/* linux/arch/arm/plat-s3c/pm-check.c
- * originally in linux/arch/arm/plat-s3c24xx/pm.c
- *
- * Copyright (c) 2004-2008 Simtec Electronics
- * http://armlinux.simtec.co.uk
- * Ben Dooks <ben@simtec.co.uk>
- *
- * S3C Power Mangament - suspend/resume memory corruption check.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// originally in linux/arch/arm/plat-s3c24xx/pm.c
+//
+// Copyright (c) 2004-2008 Simtec Electronics
+// http://armlinux.simtec.co.uk
+// Ben Dooks <ben@simtec.co.uk>
+//
+// S3C Power Mangament - suspend/resume memory corruption check.
#include <linux/kernel.h>
#include <linux/suspend.h>
-/*
- * Copyright (C) 2013 Samsung Electronics Co., Ltd.
- * Tomasz Figa <t.figa@samsung.com>
- * Copyright (C) 2008 Openmoko, Inc.
- * Copyright (C) 2004-2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * Samsung common power management helper functions.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (C) 2013 Samsung Electronics Co., Ltd.
+// Tomasz Figa <t.figa@samsung.com>
+// Copyright (C) 2008 Openmoko, Inc.
+// Copyright (C) 2004-2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
+//
+// Samsung common power management helper functions.
#include <linux/io.h>
#include <linux/kernel.h>
-/*
- * Copyright (C) 2013 Samsung Electronics Co., Ltd.
- * Tomasz Figa <t.figa@samsung.com>
- * Copyright (C) 2008 Openmoko, Inc.
- * Copyright (C) 2004-2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * Samsung common power management (suspend to RAM) debug support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (C) 2013 Samsung Electronics Co., Ltd.
+// Tomasz Figa <t.figa@samsung.com>
+// Copyright (C) 2008 Openmoko, Inc.
+// Copyright (C) 2004-2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
+//
+// Samsung common power management (suspend to RAM) debug support
#include <linux/serial_core.h>
#include <linux/serial_s3c.h>
-
-/* linux/arch/arm/plat-s3c/pm-gpio.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * S3C series GPIO PM code
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Copyright 2008 Openmoko, Inc.
+// Copyright 2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
+//
+// S3C series GPIO PM code
#include <linux/kernel.h>
#include <linux/device.h>
-/* linux/arch/arm/plat-s3c/pm.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2004-2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * S3C common power management (suspend to ram) support.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2008 Openmoko, Inc.
+// Copyright 2004-2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+// http://armlinux.simtec.co.uk/
+//
+// S3C common power management (suspend to ram) support.
#include <linux/init.h>
#include <linux/suspend.h>
-/* arch/arm/plat-samsung/wakeup-mask.c
- *
- * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
- *
- * Support for wakeup mask interrupts on newer SoCs
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2010 Ben Dooks <ben-linux@fluff.org>
+//
+// Support for wakeup mask interrupts on newer SoCs
#include <linux/kernel.h>
#include <linux/spinlock.h>
-/* arch/arm/plat-samsung/watchdog-reset.c
- *
- * Copyright (c) 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
- *
- * Watchdog reset support for Samsung SoCs.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2008 Simtec Electronics
+// Ben Dooks <ben@simtec.co.uk>
+//
+// Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
+//
+// Watchdog reset support for Samsung SoCs.
#include <linux/clk.h>
#include <linux/err.h>
linkstation_mini MACH_LINKSTATION_MINI LINKSTATION_MINI 1858
afeb9260 MACH_AFEB9260 AFEB9260 1859
imx27ipcam MACH_IMX27IPCAM IMX27IPCAM 1871
+bk3 MACH_BK3 BK3 1880
rd88f6183ap_ge MACH_RD88F6183AP_GE RD88F6183AP_GE 1894
realview_pba8 MACH_REALVIEW_PBA8 REALVIEW_PBA8 1897
realview_pbx MACH_REALVIEW_PBX REALVIEW_PBX 1901
CONFIG_NUMA=y
CONFIG_PREEMPT=y
CONFIG_KSM=y
+CONFIG_MEMORY_FAILURE=y
CONFIG_TRANSPARENT_HUGEPAGE=y
CONFIG_CMA=y
CONFIG_SECCOMP=y
CONFIG_ARM_CPUIDLE=y
CONFIG_CPU_FREQ=y
CONFIG_CPUFREQ_DT=y
+CONFIG_ARM_ARMADA_37XX_CPUFREQ=y
CONFIG_ARM_BIG_LITTLE_CPUFREQ=y
CONFIG_ARM_SCPI_CPUFREQ=y
CONFIG_ACPI_CPPC_CPUFREQ=m
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_TEGRA=y
CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_MSM=y
CONFIG_USB_EHCI_EXYNOS=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_RENESAS_USBHS=m
CONFIG_USB_STORAGE=y
+CONFIG_USB_MUSB_HDRC=y
+CONFIG_USB_MUSB_SUNXI=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC2=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_ISP1760=y
CONFIG_USB_HSIC_USB3503=y
CONFIG_NOP_USB_XCEIV=y
-CONFIG_USB_MSM_OTG=y
-CONFIG_USB_QCOM_8X16_PHY=y
CONFIG_USB_ULPI=y
CONFIG_USB_GADGET=y
CONFIG_USB_RENESAS_USBHS_UDC=m
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_LEDS_TRIGGER_PANIC=y
+CONFIG_LEDS_TRIGGER_DISK=y
CONFIG_EDAC=y
+CONFIG_EDAC_GHES=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_MAX77686=y
CONFIG_RTC_DRV_RK808=m
CONFIG_PHY_TEGRA_XUSB=y
CONFIG_QCOM_L2_PMU=y
CONFIG_QCOM_L3_PMU=y
+CONFIG_UNIPHIER_EFUSE=y
CONFIG_TEE=y
CONFIG_OPTEE=y
CONFIG_ARM_SCPI_PROTOCOL=y
CONFIG_ACPI_APEI=y
CONFIG_ACPI_APEI_GHES=y
CONFIG_ACPI_APEI_PCIEAER=y
+CONFIG_ACPI_APEI_MEMORY_FAILURE=y
+CONFIG_ACPI_APEI_EINJ=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/platform_device.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/of_address.h>
#include <linux/clk.h>
#include <linux/slab.h>
#include <linux/io.h>
-#include <linux/i2c/pxa-i2c.h>
+#include <linux/platform_data/i2c-pxa.h>
#include <asm/irq.h>
obj-$(CONFIG_ARCH_DOVE) += dove/
obj-$(CONFIG_MACH_DOVE) += dove/
obj-y += fsl/
+obj-$(CONFIG_ARCH_GEMINI) += gemini/
obj-$(CONFIG_ARCH_MXC) += imx/
obj-$(CONFIG_SOC_XWAY) += lantiq/
obj-y += mediatek/
--- /dev/null
+# SPDX-License-Identifier: GPL-2.0
+obj-y += soc-gemini.o
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2017 Linaro Ltd.
+ *
+ * Author: Linus Walleij <linus.walleij@linaro.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ *
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/mfd/syscon.h>
+#include <linux/regmap.h>
+#include <linux/of.h>
+
+#define GLOBAL_WORD_ID 0x00
+#define GEMINI_GLOBAL_ARB1_CTRL 0x2c
+#define GEMINI_ARB1_BURST_MASK GENMASK(21, 16)
+#define GEMINI_ARB1_BURST_SHIFT 16
+/* These all define the priority on the BUS2 backplane */
+#define GEMINI_ARB1_PRIO_MASK GENMASK(9, 0)
+#define GEMINI_ARB1_DMAC_HIGH_PRIO BIT(0)
+#define GEMINI_ARB1_IDE_HIGH_PRIO BIT(1)
+#define GEMINI_ARB1_RAID_HIGH_PRIO BIT(2)
+#define GEMINI_ARB1_SECURITY_HIGH_PRIO BIT(3)
+#define GEMINI_ARB1_GMAC0_HIGH_PRIO BIT(4)
+#define GEMINI_ARB1_GMAC1_HIGH_PRIO BIT(5)
+#define GEMINI_ARB1_USB0_HIGH_PRIO BIT(6)
+#define GEMINI_ARB1_USB1_HIGH_PRIO BIT(7)
+#define GEMINI_ARB1_PCI_HIGH_PRIO BIT(8)
+#define GEMINI_ARB1_TVE_HIGH_PRIO BIT(9)
+
+#define GEMINI_DEFAULT_BURST_SIZE 0x20
+#define GEMINI_DEFAULT_PRIO (GEMINI_ARB1_GMAC0_HIGH_PRIO | \
+ GEMINI_ARB1_GMAC1_HIGH_PRIO)
+
+static int __init gemini_soc_init(void)
+{
+ struct regmap *map;
+ u32 rev;
+ u32 val;
+ int ret;
+
+ /* Multiplatform guard, only proceed on Gemini */
+ if (!of_machine_is_compatible("cortina,gemini"))
+ return 0;
+
+ map = syscon_regmap_lookup_by_compatible("cortina,gemini-syscon");
+ if (IS_ERR(map))
+ return PTR_ERR(map);
+ ret = regmap_read(map, GLOBAL_WORD_ID, &rev);
+ if (ret)
+ return ret;
+
+ val = (GEMINI_DEFAULT_BURST_SIZE << GEMINI_ARB1_BURST_SHIFT) |
+ GEMINI_DEFAULT_PRIO;
+
+ /* Set up system arbitration */
+ regmap_update_bits(map,
+ GEMINI_GLOBAL_ARB1_CTRL,
+ GEMINI_ARB1_BURST_MASK | GEMINI_ARB1_PRIO_MASK,
+ val);
+
+ pr_info("Gemini SoC %04x revision %02x, set arbitration %08x\n",
+ rev >> 8, rev & 0xff, val);
+
+ return 0;
+}
+subsys_initcall(gemini_soc_init);
#define INFRA_TOPAXI_PROTECTEN 0x0220
#define INFRA_TOPAXI_PROTECTSTA1 0x0228
+#define INFRA_TOPAXI_PROTECTEN_SET 0x0260
+#define INFRA_TOPAXI_PROTECTEN_CLR 0x0264
/**
* mtk_infracfg_set_bus_protection - enable bus protection
* @regmap: The infracfg regmap
* @mask: The mask containing the protection bits to be enabled.
+ * @reg_update: The boolean flag determines to set the protection bits
+ * by regmap_update_bits with enable register(PROTECTEN) or
+ * by regmap_write with set register(PROTECTEN_SET).
*
* This function enables the bus protection bits for disabled power
* domains so that the system does not hang when some unit accesses the
* bus while in power down.
*/
-int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask)
+int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask,
+ bool reg_update)
{
unsigned long expired;
u32 val;
int ret;
- regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, mask);
+ if (reg_update)
+ regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask,
+ mask);
+ else
+ regmap_write(infracfg, INFRA_TOPAXI_PROTECTEN_SET, mask);
expired = jiffies + HZ;
* mtk_infracfg_clear_bus_protection - disable bus protection
* @regmap: The infracfg regmap
* @mask: The mask containing the protection bits to be disabled.
+ * @reg_update: The boolean flag determines to clear the protection bits
+ * by regmap_update_bits with enable register(PROTECTEN) or
+ * by regmap_write with clear register(PROTECTEN_CLR).
*
* This function disables the bus protection bits previously enabled with
* mtk_infracfg_set_bus_protection.
*/
-int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask)
+
+int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask,
+ bool reg_update)
{
unsigned long expired;
int ret;
- regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, 0);
+ if (reg_update)
+ regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, 0);
+ else
+ regmap_write(infracfg, INFRA_TOPAXI_PROTECTEN_CLR, mask);
expired = jiffies + HZ;
#include <linux/soc/mediatek/infracfg.h>
#include <dt-bindings/power/mt2701-power.h>
+#include <dt-bindings/power/mt2712-power.h>
#include <dt-bindings/power/mt6797-power.h>
#include <dt-bindings/power/mt7622-power.h>
#include <dt-bindings/power/mt8173-power.h>
#define SPM_DIS_PWR_CON 0x023c
#define SPM_CONN_PWR_CON 0x0280
#define SPM_VEN2_PWR_CON 0x0298
-#define SPM_AUDIO_PWR_CON 0x029c /* MT8173 */
+#define SPM_AUDIO_PWR_CON 0x029c /* MT8173, MT2712 */
#define SPM_BDP_PWR_CON 0x029c /* MT2701 */
#define SPM_ETH_PWR_CON 0x02a0
#define SPM_HIF_PWR_CON 0x02a4
#define SPM_MFG_2D_PWR_CON 0x02c0
#define SPM_MFG_ASYNC_PWR_CON 0x02c4
#define SPM_USB_PWR_CON 0x02cc
+#define SPM_USB2_PWR_CON 0x02d4 /* MT2712 */
#define SPM_ETHSYS_PWR_CON 0x02e0 /* MT7622 */
#define SPM_HIF0_PWR_CON 0x02e4 /* MT7622 */
#define SPM_HIF1_PWR_CON 0x02e8 /* MT7622 */
#define SPM_WB_PWR_CON 0x02ec /* MT7622 */
-
#define SPM_PWR_STATUS 0x060c
#define SPM_PWR_STATUS_2ND 0x0610
#define PWR_STATUS_ETH BIT(15)
#define PWR_STATUS_HIF BIT(16)
#define PWR_STATUS_IFR_MSC BIT(17)
+#define PWR_STATUS_USB2 BIT(19) /* MT2712 */
#define PWR_STATUS_VENC_LT BIT(20)
#define PWR_STATUS_VENC BIT(21)
-#define PWR_STATUS_MFG_2D BIT(22)
-#define PWR_STATUS_MFG_ASYNC BIT(23)
-#define PWR_STATUS_AUDIO BIT(24)
-#define PWR_STATUS_USB BIT(25)
+#define PWR_STATUS_MFG_2D BIT(22) /* MT8173 */
+#define PWR_STATUS_MFG_ASYNC BIT(23) /* MT8173 */
+#define PWR_STATUS_AUDIO BIT(24) /* MT8173, MT2712 */
+#define PWR_STATUS_USB BIT(25) /* MT8173, MT2712 */
#define PWR_STATUS_ETHSYS BIT(24) /* MT7622 */
#define PWR_STATUS_HIF0 BIT(25) /* MT7622 */
#define PWR_STATUS_HIF1 BIT(26) /* MT7622 */
CLK_ETHIF,
CLK_VDEC,
CLK_HIFSEL,
+ CLK_JPGDEC,
+ CLK_AUDIO,
CLK_MAX,
};
"ethif",
"vdec",
"hif_sel",
+ "jpgdec",
+ "audio",
NULL,
};
-#define MAX_CLKS 2
+#define MAX_CLKS 3
struct scp_domain_data {
const char *name;
void __iomem *base;
struct regmap *infracfg;
struct scp_ctrl_reg ctrl_reg;
+ bool bus_prot_reg_update;
};
struct scp_subdomain {
const struct scp_subdomain *subdomains;
int num_subdomains;
const struct scp_ctrl_reg regs;
+ bool bus_prot_reg_update;
};
static int scpsys_domain_is_on(struct scp_domain *scpd)
if (scpd->data->bus_prot_mask) {
ret = mtk_infracfg_clear_bus_protection(scp->infracfg,
- scpd->data->bus_prot_mask);
+ scpd->data->bus_prot_mask,
+ scp->bus_prot_reg_update);
if (ret)
goto err_pwr_ack;
}
if (scpd->data->bus_prot_mask) {
ret = mtk_infracfg_set_bus_protection(scp->infracfg,
- scpd->data->bus_prot_mask);
+ scpd->data->bus_prot_mask,
+ scp->bus_prot_reg_update);
if (ret)
goto out;
}
static struct scp *init_scp(struct platform_device *pdev,
const struct scp_domain_data *scp_domain_data, int num,
- const struct scp_ctrl_reg *scp_ctrl_reg)
+ const struct scp_ctrl_reg *scp_ctrl_reg,
+ bool bus_prot_reg_update)
{
struct genpd_onecell_data *pd_data;
struct resource *res;
scp->ctrl_reg.pwr_sta_offs = scp_ctrl_reg->pwr_sta_offs;
scp->ctrl_reg.pwr_sta2nd_offs = scp_ctrl_reg->pwr_sta2nd_offs;
+ scp->bus_prot_reg_update = bus_prot_reg_update;
+
scp->dev = &pdev->dev;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
},
};
+/*
+ * MT2712 power domain support
+ */
+static const struct scp_domain_data scp_domain_data_mt2712[] = {
+ [MT2712_POWER_DOMAIN_MM] = {
+ .name = "mm",
+ .sta_mask = PWR_STATUS_DISP,
+ .ctl_offs = SPM_DIS_PWR_CON,
+ .sram_pdn_bits = GENMASK(8, 8),
+ .sram_pdn_ack_bits = GENMASK(12, 12),
+ .clk_id = {CLK_MM},
+ .active_wakeup = true,
+ },
+ [MT2712_POWER_DOMAIN_VDEC] = {
+ .name = "vdec",
+ .sta_mask = PWR_STATUS_VDEC,
+ .ctl_offs = SPM_VDE_PWR_CON,
+ .sram_pdn_bits = GENMASK(8, 8),
+ .sram_pdn_ack_bits = GENMASK(12, 12),
+ .clk_id = {CLK_MM, CLK_VDEC},
+ .active_wakeup = true,
+ },
+ [MT2712_POWER_DOMAIN_VENC] = {
+ .name = "venc",
+ .sta_mask = PWR_STATUS_VENC,
+ .ctl_offs = SPM_VEN_PWR_CON,
+ .sram_pdn_bits = GENMASK(11, 8),
+ .sram_pdn_ack_bits = GENMASK(15, 12),
+ .clk_id = {CLK_MM, CLK_VENC, CLK_JPGDEC},
+ .active_wakeup = true,
+ },
+ [MT2712_POWER_DOMAIN_ISP] = {
+ .name = "isp",
+ .sta_mask = PWR_STATUS_ISP,
+ .ctl_offs = SPM_ISP_PWR_CON,
+ .sram_pdn_bits = GENMASK(11, 8),
+ .sram_pdn_ack_bits = GENMASK(13, 12),
+ .clk_id = {CLK_MM},
+ .active_wakeup = true,
+ },
+ [MT2712_POWER_DOMAIN_AUDIO] = {
+ .name = "audio",
+ .sta_mask = PWR_STATUS_AUDIO,
+ .ctl_offs = SPM_AUDIO_PWR_CON,
+ .sram_pdn_bits = GENMASK(11, 8),
+ .sram_pdn_ack_bits = GENMASK(15, 12),
+ .clk_id = {CLK_AUDIO},
+ .active_wakeup = true,
+ },
+ [MT2712_POWER_DOMAIN_USB] = {
+ .name = "usb",
+ .sta_mask = PWR_STATUS_USB,
+ .ctl_offs = SPM_USB_PWR_CON,
+ .sram_pdn_bits = GENMASK(10, 8),
+ .sram_pdn_ack_bits = GENMASK(14, 12),
+ .clk_id = {CLK_NONE},
+ .active_wakeup = true,
+ },
+ [MT2712_POWER_DOMAIN_USB2] = {
+ .name = "usb2",
+ .sta_mask = PWR_STATUS_USB2,
+ .ctl_offs = SPM_USB2_PWR_CON,
+ .sram_pdn_bits = GENMASK(10, 8),
+ .sram_pdn_ack_bits = GENMASK(14, 12),
+ .clk_id = {CLK_NONE},
+ .active_wakeup = true,
+ },
+ [MT2712_POWER_DOMAIN_MFG] = {
+ .name = "mfg",
+ .sta_mask = PWR_STATUS_MFG,
+ .ctl_offs = SPM_MFG_PWR_CON,
+ .sram_pdn_bits = GENMASK(11, 8),
+ .sram_pdn_ack_bits = GENMASK(19, 16),
+ .clk_id = {CLK_MFG},
+ .bus_prot_mask = BIT(14) | BIT(21) | BIT(23),
+ .active_wakeup = true,
+ },
+};
+
/*
* MT6797 power domain support
*/
.regs = {
.pwr_sta_offs = SPM_PWR_STATUS,
.pwr_sta2nd_offs = SPM_PWR_STATUS_2ND
- }
+ },
+ .bus_prot_reg_update = true,
+};
+
+static const struct scp_soc_data mt2712_data = {
+ .domains = scp_domain_data_mt2712,
+ .num_domains = ARRAY_SIZE(scp_domain_data_mt2712),
+ .regs = {
+ .pwr_sta_offs = SPM_PWR_STATUS,
+ .pwr_sta2nd_offs = SPM_PWR_STATUS_2ND
+ },
+ .bus_prot_reg_update = false,
};
static const struct scp_soc_data mt6797_data = {
.regs = {
.pwr_sta_offs = SPM_PWR_STATUS_MT6797,
.pwr_sta2nd_offs = SPM_PWR_STATUS_2ND_MT6797
- }
+ },
+ .bus_prot_reg_update = true,
};
static const struct scp_soc_data mt7622_data = {
.regs = {
.pwr_sta_offs = SPM_PWR_STATUS,
.pwr_sta2nd_offs = SPM_PWR_STATUS_2ND
- }
+ },
+ .bus_prot_reg_update = true,
};
static const struct scp_soc_data mt8173_data = {
.regs = {
.pwr_sta_offs = SPM_PWR_STATUS,
.pwr_sta2nd_offs = SPM_PWR_STATUS_2ND
- }
+ },
+ .bus_prot_reg_update = true,
};
/*
{
.compatible = "mediatek,mt2701-scpsys",
.data = &mt2701_data,
+ }, {
+ .compatible = "mediatek,mt2712-scpsys",
+ .data = &mt2712_data,
}, {
.compatible = "mediatek,mt6797-scpsys",
.data = &mt6797_data,
match = of_match_device(of_scpsys_match_tbl, &pdev->dev);
soc = (const struct scp_soc_data *)match->data;
- scp = init_scp(pdev, soc->domains, soc->num_domains, &soc->regs);
+ scp = init_scp(pdev, soc->domains, soc->num_domains, &soc->regs,
+ soc->bus_prot_reg_update);
if (IS_ERR(scp))
return PTR_ERR(scp);
if (!(pd->flags & (PD_CPU | PD_SCU))) {
/* Enable Clock Domain for I/O devices */
- genpd->flags |= GENPD_FLAG_PM_CLK;
+ genpd->flags |= GENPD_FLAG_PM_CLK | GENPD_FLAG_ACTIVE_WAKEUP;
if (has_cpg_mstp) {
genpd->attach_dev = cpg_mstp_attach_dev;
genpd->detach_dev = cpg_mstp_detach_dev;
if (chipid) {
product = readl(chipid);
iounmap(chipid);
+ /* R-Car M3-W ES1.1 incorrectly identifies as ES2.0 */
+ if ((product & 0x7fff) == 0x5210)
+ product ^= 0x11;
if (soc->id && ((product >> 8) & 0xff) != soc->id) {
pr_warn("SoC mismatch (product = 0x%x)\n", product);
return -ENODEV;
select TEGRA_BPMP
select TEGRA_HSP_MBOX
select TEGRA_IVC
- select SOC_TEGRA_PMC_TEGRA186
+ select SOC_TEGRA_PMC
help
Enable support for the NVIDIA Tegar186 SoC. The Tegra186 features a
combination of Denver and Cortex-A57 CPU cores and a GPU based on
config SOC_TEGRA_PMC
bool
-config SOC_TEGRA_PMC_TEGRA186
- bool
-
config SOC_TEGRA_POWERGATE_BPMP
def_bool y
depends on PM_GENERIC_DOMAINS
obj-y += common.o
obj-$(CONFIG_SOC_TEGRA_FLOWCTRL) += flowctrl.o
obj-$(CONFIG_SOC_TEGRA_PMC) += pmc.o
-obj-$(CONFIG_SOC_TEGRA_PMC_TEGRA186) += pmc-tegra186.o
obj-$(CONFIG_SOC_TEGRA_POWERGATE_BPMP) += powergate-bpmp.o
};
static const struct of_device_id tegra_fuse_match[] = {
+#ifdef CONFIG_ARCH_TEGRA_186_SOC
+ { .compatible = "nvidia,tegra186-efuse", .data = &tegra186_fuse_soc },
+#endif
#ifdef CONFIG_ARCH_TEGRA_210_SOC
{ .compatible = "nvidia,tegra210-efuse", .data = &tegra210_fuse_soc },
#endif
/* take over the memory region from the early initialization */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ fuse->phys = res->start;
fuse->base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(fuse->base))
return PTR_ERR(fuse->base);
mutex_lock(&fuse->apbdma.lock);
- fuse->apbdma.config.src_addr = fuse->apbdma.phys + FUSE_BEGIN + offset;
+ fuse->apbdma.config.src_addr = fuse->phys + FUSE_BEGIN + offset;
err = dmaengine_slave_config(fuse->apbdma.chan, &fuse->apbdma.config);
if (err)
return value;
}
+static bool dma_filter(struct dma_chan *chan, void *filter_param)
+{
+ struct device_node *np = chan->device->dev->of_node;
+
+ return of_device_is_compatible(np, "nvidia,tegra20-apbdma");
+}
+
static int tegra20_fuse_probe(struct tegra_fuse *fuse)
{
dma_cap_mask_t mask;
dma_cap_zero(mask);
dma_cap_set(DMA_SLAVE, mask);
- fuse->apbdma.chan = dma_request_channel(mask, NULL, NULL);
+ fuse->apbdma.chan = __dma_request_channel(&mask, dma_filter, NULL);
if (!fuse->apbdma.chan)
return -EPROBE_DEFER;
fuse->apbdma.config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
fuse->apbdma.config.src_maxburst = 1;
fuse->apbdma.config.dst_maxburst = 1;
+ fuse->apbdma.config.direction = DMA_DEV_TO_MEM;
+ fuse->apbdma.config.device_fc = false;
init_completion(&fuse->apbdma.wait);
mutex_init(&fuse->apbdma.lock);
defined(CONFIG_ARCH_TEGRA_114_SOC) || \
defined(CONFIG_ARCH_TEGRA_124_SOC) || \
defined(CONFIG_ARCH_TEGRA_132_SOC) || \
- defined(CONFIG_ARCH_TEGRA_210_SOC)
+ defined(CONFIG_ARCH_TEGRA_210_SOC) || \
+ defined(CONFIG_ARCH_TEGRA_186_SOC)
static u32 tegra30_fuse_read_early(struct tegra_fuse *fuse, unsigned int offset)
{
+ if (WARN_ON(!fuse->base))
+ return 0;
+
return readl_relaxed(fuse->base + FUSE_BEGIN + offset);
}
fuse->read = tegra30_fuse_read;
tegra_init_revision();
- fuse->soc->speedo_init(&tegra_sku_info);
+
+ if (fuse->soc->speedo_init)
+ fuse->soc->speedo_init(&tegra_sku_info);
+
tegra30_fuse_add_randomness();
}
#endif
.info = &tegra210_fuse_info,
};
#endif
+
+#if defined(CONFIG_ARCH_TEGRA_186_SOC)
+static const struct tegra_fuse_info tegra186_fuse_info = {
+ .read = tegra30_fuse_read,
+ .size = 0x300,
+ .spare = 0x280,
+};
+
+const struct tegra_fuse_soc tegra186_fuse_soc = {
+ .init = tegra30_fuse_init,
+ .info = &tegra186_fuse_info,
+};
+#endif
extern const struct tegra_fuse_soc tegra210_fuse_soc;
#endif
+#ifdef CONFIG_ARCH_TEGRA_186_SOC
+extern const struct tegra_fuse_soc tegra186_fuse_soc;
+#endif
+
#endif
static bool long_ram_code;
u32 tegra_read_chipid(void)
-{
- return readl_relaxed(apbmisc_base + 4);
-}
-
-u8 tegra_get_chip_id(void)
{
if (!apbmisc_base) {
WARN(1, "Tegra Chip ID not yet available\n");
return 0;
}
+ return readl_relaxed(apbmisc_base + 4);
+}
+
+u8 tegra_get_chip_id(void)
+{
return (tegra_read_chipid() >> 8) & 0xff;
}
static const struct of_device_id apbmisc_match[] __initconst = {
{ .compatible = "nvidia,tegra20-apbmisc", },
+ { .compatible = "nvidia,tegra186-misc", },
{},
};
+++ /dev/null
-/*
- * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- */
-
-#define pr_fmt(fmt) "tegra-pmc: " fmt
-
-#include <linux/io.h>
-#include <linux/module.h>
-#include <linux/of.h>
-#include <linux/platform_device.h>
-#include <linux/reboot.h>
-
-#include <asm/system_misc.h>
-
-#define PMC_CNTRL 0x000
-#define PMC_CNTRL_MAIN_RST BIT(4)
-
-#define PMC_RST_STATUS 0x070
-
-#define WAKE_AOWAKE_CTRL 0x4f4
-#define WAKE_AOWAKE_CTRL_INTR_POLARITY BIT(0)
-
-#define SCRATCH_SCRATCH0 0x2000
-#define SCRATCH_SCRATCH0_MODE_RECOVERY BIT(31)
-#define SCRATCH_SCRATCH0_MODE_BOOTLOADER BIT(30)
-#define SCRATCH_SCRATCH0_MODE_RCM BIT(1)
-#define SCRATCH_SCRATCH0_MODE_MASK (SCRATCH_SCRATCH0_MODE_RECOVERY | \
- SCRATCH_SCRATCH0_MODE_BOOTLOADER | \
- SCRATCH_SCRATCH0_MODE_RCM)
-
-struct tegra_pmc {
- struct device *dev;
- void __iomem *regs;
- void __iomem *wake;
- void __iomem *aotag;
- void __iomem *scratch;
-
- void (*system_restart)(enum reboot_mode mode, const char *cmd);
- struct notifier_block restart;
-};
-
-static int tegra186_pmc_restart_notify(struct notifier_block *nb,
- unsigned long action,
- void *data)
-{
- struct tegra_pmc *pmc = container_of(nb, struct tegra_pmc, restart);
- const char *cmd = data;
- u32 value;
-
- value = readl(pmc->scratch + SCRATCH_SCRATCH0);
- value &= ~SCRATCH_SCRATCH0_MODE_MASK;
-
- if (cmd) {
- if (strcmp(cmd, "recovery") == 0)
- value |= SCRATCH_SCRATCH0_MODE_RECOVERY;
-
- if (strcmp(cmd, "bootloader") == 0)
- value |= SCRATCH_SCRATCH0_MODE_BOOTLOADER;
-
- if (strcmp(cmd, "forced-recovery") == 0)
- value |= SCRATCH_SCRATCH0_MODE_RCM;
- }
-
- writel(value, pmc->scratch + SCRATCH_SCRATCH0);
-
- /*
- * If available, call the system restart implementation that was
- * registered earlier (typically PSCI).
- */
- if (pmc->system_restart) {
- pmc->system_restart(reboot_mode, cmd);
- return NOTIFY_DONE;
- }
-
- /* reset everything but SCRATCH0_SCRATCH0 and PMC_RST_STATUS */
- value = readl(pmc->regs + PMC_CNTRL);
- value |= PMC_CNTRL_MAIN_RST;
- writel(value, pmc->regs + PMC_CNTRL);
-
- return NOTIFY_DONE;
-}
-
-static int tegra186_pmc_setup(struct tegra_pmc *pmc)
-{
- struct device_node *np = pmc->dev->of_node;
- bool invert;
- u32 value;
-
- invert = of_property_read_bool(np, "nvidia,invert-interrupt");
-
- value = readl(pmc->wake + WAKE_AOWAKE_CTRL);
-
- if (invert)
- value |= WAKE_AOWAKE_CTRL_INTR_POLARITY;
- else
- value &= ~WAKE_AOWAKE_CTRL_INTR_POLARITY;
-
- writel(value, pmc->wake + WAKE_AOWAKE_CTRL);
-
- /*
- * We need to hook any system restart implementation registered
- * previously so we can write SCRATCH_SCRATCH0 before reset.
- */
- pmc->system_restart = arm_pm_restart;
- arm_pm_restart = NULL;
-
- pmc->restart.notifier_call = tegra186_pmc_restart_notify;
- pmc->restart.priority = 128;
-
- return register_restart_handler(&pmc->restart);
-}
-
-static int tegra186_pmc_probe(struct platform_device *pdev)
-{
- struct tegra_pmc *pmc;
- struct resource *res;
-
- pmc = devm_kzalloc(&pdev->dev, sizeof(*pmc), GFP_KERNEL);
- if (!pmc)
- return -ENOMEM;
-
- pmc->dev = &pdev->dev;
-
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pmc");
- pmc->regs = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(pmc->regs))
- return PTR_ERR(pmc->regs);
-
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "wake");
- pmc->wake = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(pmc->wake))
- return PTR_ERR(pmc->wake);
-
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "aotag");
- pmc->aotag = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(pmc->aotag))
- return PTR_ERR(pmc->aotag);
-
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "scratch");
- pmc->scratch = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(pmc->scratch))
- return PTR_ERR(pmc->scratch);
-
- return tegra186_pmc_setup(pmc);
-}
-
-static const struct of_device_id tegra186_pmc_of_match[] = {
- { .compatible = "nvidia,tegra186-pmc" },
- { /* sentinel */ }
-};
-MODULE_DEVICE_TABLE(of, tegra186_pmc_of_match);
-
-static struct platform_driver tegra186_pmc_driver = {
- .driver = {
- .name = "tegra186-pmc",
- .of_match_table = tegra186_pmc_of_match,
- },
- .probe = tegra186_pmc_probe,
-};
-builtin_platform_driver(tegra186_pmc_driver);
#define PMC_PWR_DET 0x48
-#define PMC_SCRATCH0 0x50
-#define PMC_SCRATCH0_MODE_RECOVERY BIT(31)
-#define PMC_SCRATCH0_MODE_BOOTLOADER BIT(30)
-#define PMC_SCRATCH0_MODE_RCM BIT(1)
-#define PMC_SCRATCH0_MODE_MASK (PMC_SCRATCH0_MODE_RECOVERY | \
+#define PMC_SCRATCH0_MODE_RECOVERY BIT(31)
+#define PMC_SCRATCH0_MODE_BOOTLOADER BIT(30)
+#define PMC_SCRATCH0_MODE_RCM BIT(1)
+#define PMC_SCRATCH0_MODE_MASK (PMC_SCRATCH0_MODE_RECOVERY | \
PMC_SCRATCH0_MODE_BOOTLOADER | \
PMC_SCRATCH0_MODE_RCM)
#define GPU_RG_CNTRL 0x2d4
+/* Tegra186 and later */
+#define WAKE_AOWAKE_CTRL 0x4f4
+#define WAKE_AOWAKE_CTRL_INTR_POLARITY BIT(0)
+
struct tegra_powergate {
struct generic_pm_domain genpd;
struct tegra_pmc *pmc;
unsigned int voltage;
};
+struct tegra_pmc_regs {
+ unsigned int scratch0;
+ unsigned int dpd_req;
+ unsigned int dpd_status;
+ unsigned int dpd2_req;
+ unsigned int dpd2_status;
+};
+
struct tegra_pmc_soc {
unsigned int num_powergates;
const char *const *powergates;
const struct tegra_io_pad_soc *io_pads;
unsigned int num_io_pads;
+
+ const struct tegra_pmc_regs *regs;
+ void (*init)(struct tegra_pmc *pmc);
+ void (*setup_irq_polarity)(struct tegra_pmc *pmc,
+ struct device_node *np,
+ bool invert);
};
/**
struct tegra_pmc {
struct device *dev;
void __iomem *base;
+ void __iomem *wake;
+ void __iomem *aotag;
+ void __iomem *scratch;
struct clk *clk;
struct dentry *debugfs;
const char *cmd = data;
u32 value;
- value = tegra_pmc_readl(PMC_SCRATCH0);
+ value = readl(pmc->scratch + pmc->soc->regs->scratch0);
value &= ~PMC_SCRATCH0_MODE_MASK;
if (cmd) {
value |= PMC_SCRATCH0_MODE_RCM;
}
- tegra_pmc_writel(value, PMC_SCRATCH0);
+ writel(value, pmc->scratch + pmc->soc->regs->scratch0);
/* reset everything but PMC_SCRATCH0 and PMC_RST_STATUS */
value = tegra_pmc_readl(PMC_CNTRL);
*mask = BIT(pad->dpd % 32);
if (pad->dpd < 32) {
- *status = IO_DPD_STATUS;
- *request = IO_DPD_REQ;
+ *status = pmc->soc->regs->dpd_status;
+ *request = pmc->soc->regs->dpd_req;
} else {
- *status = IO_DPD2_STATUS;
- *request = IO_DPD2_REQ;
+ *status = pmc->soc->regs->dpd2_status;
+ *request = pmc->soc->regs->dpd2_req;
}
- rate = clk_get_rate(pmc->clk);
- if (!rate) {
- pr_err("failed to get clock rate\n");
- return -ENODEV;
- }
+ if (pmc->clk) {
+ rate = clk_get_rate(pmc->clk);
+ if (!rate) {
+ pr_err("failed to get clock rate\n");
+ return -ENODEV;
+ }
- tegra_pmc_writel(DPD_SAMPLE_ENABLE, DPD_SAMPLE);
+ tegra_pmc_writel(DPD_SAMPLE_ENABLE, DPD_SAMPLE);
- /* must be at least 200 ns, in APB (PCLK) clock cycles */
- value = DIV_ROUND_UP(1000000000, rate);
- value = DIV_ROUND_UP(200, value);
- tegra_pmc_writel(value, SEL_DPD_TIM);
+ /* must be at least 200 ns, in APB (PCLK) clock cycles */
+ value = DIV_ROUND_UP(1000000000, rate);
+ value = DIV_ROUND_UP(200, value);
+ tegra_pmc_writel(value, SEL_DPD_TIM);
+ }
return 0;
}
static void tegra_io_pad_unprepare(void)
{
- tegra_pmc_writel(DPD_SAMPLE_DISABLE, DPD_SAMPLE);
+ if (pmc->clk)
+ tegra_pmc_writel(DPD_SAMPLE_DISABLE, DPD_SAMPLE);
}
/**
static void tegra_pmc_init(struct tegra_pmc *pmc)
{
- u32 value;
-
- /* Always enable CPU power request */
- value = tegra_pmc_readl(PMC_CNTRL);
- value |= PMC_CNTRL_CPU_PWRREQ_OE;
- tegra_pmc_writel(value, PMC_CNTRL);
-
- value = tegra_pmc_readl(PMC_CNTRL);
-
- if (pmc->sysclkreq_high)
- value &= ~PMC_CNTRL_SYSCLK_POLARITY;
- else
- value |= PMC_CNTRL_SYSCLK_POLARITY;
-
- /* configure the output polarity while the request is tristated */
- tegra_pmc_writel(value, PMC_CNTRL);
-
- /* now enable the request */
- value = tegra_pmc_readl(PMC_CNTRL);
- value |= PMC_CNTRL_SYSCLK_OE;
- tegra_pmc_writel(value, PMC_CNTRL);
+ if (pmc->soc->init)
+ pmc->soc->init(pmc);
}
static void tegra_pmc_init_tsense_reset(struct tegra_pmc *pmc)
if (IS_ERR(base))
return PTR_ERR(base);
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "wake");
+ if (res) {
+ pmc->wake = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(pmc->wake))
+ return PTR_ERR(pmc->wake);
+ } else {
+ pmc->wake = base;
+ }
+
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "aotag");
+ if (res) {
+ pmc->aotag = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(pmc->aotag))
+ return PTR_ERR(pmc->aotag);
+ } else {
+ pmc->aotag = base;
+ }
+
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "scratch");
+ if (res) {
+ pmc->scratch = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(pmc->scratch))
+ return PTR_ERR(pmc->scratch);
+ } else {
+ pmc->scratch = base;
+ }
+
pmc->clk = devm_clk_get(&pdev->dev, "pclk");
if (IS_ERR(pmc->clk)) {
err = PTR_ERR(pmc->clk);
- dev_err(&pdev->dev, "failed to get pclk: %d\n", err);
- return err;
+
+ if (err != -ENOENT) {
+ dev_err(&pdev->dev, "failed to get pclk: %d\n", err);
+ return err;
+ }
+
+ pmc->clk = NULL;
}
pmc->dev = &pdev->dev;
[TEGRA_POWERGATE_MPE] = "mpe",
};
+static const struct tegra_pmc_regs tegra20_pmc_regs = {
+ .scratch0 = 0x50,
+ .dpd_req = 0x1b8,
+ .dpd_status = 0x1bc,
+ .dpd2_req = 0x1c0,
+ .dpd2_status = 0x1c4,
+};
+
+static void tegra20_pmc_init(struct tegra_pmc *pmc)
+{
+ u32 value;
+
+ /* Always enable CPU power request */
+ value = tegra_pmc_readl(PMC_CNTRL);
+ value |= PMC_CNTRL_CPU_PWRREQ_OE;
+ tegra_pmc_writel(value, PMC_CNTRL);
+
+ value = tegra_pmc_readl(PMC_CNTRL);
+
+ if (pmc->sysclkreq_high)
+ value &= ~PMC_CNTRL_SYSCLK_POLARITY;
+ else
+ value |= PMC_CNTRL_SYSCLK_POLARITY;
+
+ /* configure the output polarity while the request is tristated */
+ tegra_pmc_writel(value, PMC_CNTRL);
+
+ /* now enable the request */
+ value = tegra_pmc_readl(PMC_CNTRL);
+ value |= PMC_CNTRL_SYSCLK_OE;
+ tegra_pmc_writel(value, PMC_CNTRL);
+}
+
+static void tegra20_pmc_setup_irq_polarity(struct tegra_pmc *pmc,
+ struct device_node *np,
+ bool invert)
+{
+ u32 value;
+
+ value = tegra_pmc_readl(PMC_CNTRL);
+
+ if (invert)
+ value |= PMC_CNTRL_INTR_POLARITY;
+ else
+ value &= ~PMC_CNTRL_INTR_POLARITY;
+
+ tegra_pmc_writel(value, PMC_CNTRL);
+}
+
static const struct tegra_pmc_soc tegra20_pmc_soc = {
.num_powergates = ARRAY_SIZE(tegra20_powergates),
.powergates = tegra20_powergates,
.cpu_powergates = NULL,
.has_tsense_reset = false,
.has_gpu_clamps = false,
+ .num_io_pads = 0,
+ .io_pads = NULL,
+ .regs = &tegra20_pmc_regs,
+ .init = tegra20_pmc_init,
+ .setup_irq_polarity = tegra20_pmc_setup_irq_polarity,
};
static const char * const tegra30_powergates[] = {
.cpu_powergates = tegra30_cpu_powergates,
.has_tsense_reset = true,
.has_gpu_clamps = false,
+ .num_io_pads = 0,
+ .io_pads = NULL,
+ .regs = &tegra20_pmc_regs,
+ .init = tegra20_pmc_init,
+ .setup_irq_polarity = tegra20_pmc_setup_irq_polarity,
};
static const char * const tegra114_powergates[] = {
.cpu_powergates = tegra114_cpu_powergates,
.has_tsense_reset = true,
.has_gpu_clamps = false,
+ .num_io_pads = 0,
+ .io_pads = NULL,
+ .regs = &tegra20_pmc_regs,
+ .init = tegra20_pmc_init,
+ .setup_irq_polarity = tegra20_pmc_setup_irq_polarity,
};
static const char * const tegra124_powergates[] = {
.has_gpu_clamps = true,
.num_io_pads = ARRAY_SIZE(tegra124_io_pads),
.io_pads = tegra124_io_pads,
+ .regs = &tegra20_pmc_regs,
+ .init = tegra20_pmc_init,
+ .setup_irq_polarity = tegra20_pmc_setup_irq_polarity,
};
static const char * const tegra210_powergates[] = {
.has_gpu_clamps = true,
.num_io_pads = ARRAY_SIZE(tegra210_io_pads),
.io_pads = tegra210_io_pads,
+ .regs = &tegra20_pmc_regs,
+ .init = tegra20_pmc_init,
+ .setup_irq_polarity = tegra20_pmc_setup_irq_polarity,
+};
+
+static const struct tegra_io_pad_soc tegra186_io_pads[] = {
+ { .id = TEGRA_IO_PAD_CSIA, .dpd = 0, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_CSIB, .dpd = 1, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_DSI, .dpd = 2, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_MIPI_BIAS, .dpd = 3, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_PEX_CLK_BIAS, .dpd = 4, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_PEX_CLK3, .dpd = 5, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_PEX_CLK2, .dpd = 6, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_PEX_CLK1, .dpd = 7, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_USB0, .dpd = 9, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_USB1, .dpd = 10, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_USB2, .dpd = 11, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_USB_BIAS, .dpd = 12, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_UART, .dpd = 14, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_AUDIO, .dpd = 17, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_HSIC, .dpd = 19, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_DBG, .dpd = 25, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_HDMI_DP0, .dpd = 28, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_HDMI_DP1, .dpd = 29, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_PEX_CNTRL, .dpd = 32, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_SDMMC2_HV, .dpd = 34, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_SDMMC4, .dpd = 36, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_CAM, .dpd = 38, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_DSIB, .dpd = 40, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_DSIC, .dpd = 41, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_DSID, .dpd = 42, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_CSIC, .dpd = 43, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_CSID, .dpd = 44, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_CSIE, .dpd = 45, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_CSIF, .dpd = 46, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_SPI, .dpd = 47, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_UFS, .dpd = 49, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_DMIC_HV, .dpd = 52, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_EDP, .dpd = 53, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_SDMMC1_HV, .dpd = 55, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_SDMMC3_HV, .dpd = 56, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_CONN, .dpd = 60, .voltage = UINT_MAX },
+ { .id = TEGRA_IO_PAD_AUDIO_HV, .dpd = 61, .voltage = UINT_MAX },
+};
+
+static const struct tegra_pmc_regs tegra186_pmc_regs = {
+ .scratch0 = 0x2000,
+ .dpd_req = 0x74,
+ .dpd_status = 0x78,
+ .dpd2_req = 0x7c,
+ .dpd2_status = 0x80,
+};
+
+static void tegra186_pmc_setup_irq_polarity(struct tegra_pmc *pmc,
+ struct device_node *np,
+ bool invert)
+{
+ struct resource regs;
+ void __iomem *wake;
+ u32 value;
+ int index;
+
+ index = of_property_match_string(np, "reg-names", "wake");
+ if (index < 0) {
+ pr_err("failed to find PMC wake registers\n");
+ return;
+ }
+
+ of_address_to_resource(np, index, ®s);
+
+ wake = ioremap_nocache(regs.start, resource_size(®s));
+ if (!wake) {
+ pr_err("failed to map PMC wake registers\n");
+ return;
+ }
+
+ value = readl(wake + WAKE_AOWAKE_CTRL);
+
+ if (invert)
+ value |= WAKE_AOWAKE_CTRL_INTR_POLARITY;
+ else
+ value &= ~WAKE_AOWAKE_CTRL_INTR_POLARITY;
+
+ writel(value, wake + WAKE_AOWAKE_CTRL);
+
+ iounmap(wake);
+}
+
+static const struct tegra_pmc_soc tegra186_pmc_soc = {
+ .num_powergates = 0,
+ .powergates = NULL,
+ .num_cpu_powergates = 0,
+ .cpu_powergates = NULL,
+ .has_tsense_reset = false,
+ .has_gpu_clamps = false,
+ .num_io_pads = ARRAY_SIZE(tegra186_io_pads),
+ .io_pads = tegra186_io_pads,
+ .regs = &tegra186_pmc_regs,
+ .init = NULL,
+ .setup_irq_polarity = tegra186_pmc_setup_irq_polarity,
};
static const struct of_device_id tegra_pmc_match[] = {
+ { .compatible = "nvidia,tegra186-pmc", .data = &tegra186_pmc_soc },
{ .compatible = "nvidia,tegra210-pmc", .data = &tegra210_pmc_soc },
{ .compatible = "nvidia,tegra132-pmc", .data = &tegra124_pmc_soc },
{ .compatible = "nvidia,tegra124-pmc", .data = &tegra124_pmc_soc },
struct device_node *np;
struct resource regs;
bool invert;
- u32 value;
mutex_init(&pmc->powergates_lock);
*/
invert = of_property_read_bool(np, "nvidia,invert-interrupt");
- value = tegra_pmc_readl(PMC_CNTRL);
-
- if (invert)
- value |= PMC_CNTRL_INTR_POLARITY;
- else
- value &= ~PMC_CNTRL_INTR_POLARITY;
-
- tegra_pmc_writel(value, PMC_CNTRL);
+ pmc->soc->setup_irq_polarity(pmc, np, invert);
of_node_put(np);
}
+++ /dev/null
-/*
- * i2c_pxa.h
- *
- * Copyright (C) 2002 Intrinsyc Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-#ifndef _I2C_PXA_H_
-#define _I2C_PXA_H_
-
-#if 0
-#define DEF_TIMEOUT 3
-#else
-/* need a longer timeout if we're dealing with the fact we may well be
- * looking at a multi-master environment
-*/
-#define DEF_TIMEOUT 32
-#endif
-
-#define BUS_ERROR (-EREMOTEIO)
-#define XFER_NAKED (-ECONNREFUSED)
-#define I2C_RETRY (-2000) /* an error has occurred retry transmit */
-
-/* ICR initialize bit values
-*
-* 15. FM 0 (100 Khz operation)
-* 14. UR 0 (No unit reset)
-* 13. SADIE 0 (Disables the unit from interrupting on slave addresses
-* matching its slave address)
-* 12. ALDIE 0 (Disables the unit from interrupt when it loses arbitration
-* in master mode)
-* 11. SSDIE 0 (Disables interrupts from a slave stop detected, in slave mode)
-* 10. BEIE 1 (Enable interrupts from detected bus errors, no ACK sent)
-* 9. IRFIE 1 (Enable interrupts from full buffer received)
-* 8. ITEIE 1 (Enables the I2C unit to interrupt when transmit buffer empty)
-* 7. GCD 1 (Disables i2c unit response to general call messages as a slave)
-* 6. IUE 0 (Disable unit until we change settings)
-* 5. SCLE 1 (Enables the i2c clock output for master mode (drives SCL)
-* 4. MA 0 (Only send stop with the ICR stop bit)
-* 3. TB 0 (We are not transmitting a byte initially)
-* 2. ACKNAK 0 (Send an ACK after the unit receives a byte)
-* 1. STOP 0 (Do not send a STOP)
-* 0. START 0 (Do not send a START)
-*
-*/
-#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
-
-/* I2C status register init values
- *
- * 10. BED 1 (Clear bus error detected)
- * 9. SAD 1 (Clear slave address detected)
- * 7. IRF 1 (Clear IDBR Receive Full)
- * 6. ITE 1 (Clear IDBR Transmit Empty)
- * 5. ALD 1 (Clear Arbitration Loss Detected)
- * 4. SSD 1 (Clear Slave Stop Detected)
- */
-#define I2C_ISR_INIT 0x7FF /* status register init */
-
-struct i2c_slave_client;
-
-struct i2c_pxa_platform_data {
- unsigned int slave_addr;
- struct i2c_slave_client *slave;
- unsigned int class;
- unsigned int use_pio :1;
- unsigned int fast_mode :1;
- unsigned int high_mode:1;
- unsigned char master_code;
- unsigned long rate;
-};
-
-extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info);
-
-#ifdef CONFIG_PXA27x
-extern void pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info);
-#endif
-
-#ifdef CONFIG_PXA3xx
-extern void pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info);
-#endif
-
-#endif
--- /dev/null
+/*
+ * i2c_pxa.h
+ *
+ * Copyright (C) 2002 Intrinsyc Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#ifndef _I2C_PXA_H_
+#define _I2C_PXA_H_
+
+#if 0
+#define DEF_TIMEOUT 3
+#else
+/* need a longer timeout if we're dealing with the fact we may well be
+ * looking at a multi-master environment
+*/
+#define DEF_TIMEOUT 32
+#endif
+
+#define BUS_ERROR (-EREMOTEIO)
+#define XFER_NAKED (-ECONNREFUSED)
+#define I2C_RETRY (-2000) /* an error has occurred retry transmit */
+
+/* ICR initialize bit values
+*
+* 15. FM 0 (100 Khz operation)
+* 14. UR 0 (No unit reset)
+* 13. SADIE 0 (Disables the unit from interrupting on slave addresses
+* matching its slave address)
+* 12. ALDIE 0 (Disables the unit from interrupt when it loses arbitration
+* in master mode)
+* 11. SSDIE 0 (Disables interrupts from a slave stop detected, in slave mode)
+* 10. BEIE 1 (Enable interrupts from detected bus errors, no ACK sent)
+* 9. IRFIE 1 (Enable interrupts from full buffer received)
+* 8. ITEIE 1 (Enables the I2C unit to interrupt when transmit buffer empty)
+* 7. GCD 1 (Disables i2c unit response to general call messages as a slave)
+* 6. IUE 0 (Disable unit until we change settings)
+* 5. SCLE 1 (Enables the i2c clock output for master mode (drives SCL)
+* 4. MA 0 (Only send stop with the ICR stop bit)
+* 3. TB 0 (We are not transmitting a byte initially)
+* 2. ACKNAK 0 (Send an ACK after the unit receives a byte)
+* 1. STOP 0 (Do not send a STOP)
+* 0. START 0 (Do not send a START)
+*
+*/
+#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
+
+/* I2C status register init values
+ *
+ * 10. BED 1 (Clear bus error detected)
+ * 9. SAD 1 (Clear slave address detected)
+ * 7. IRF 1 (Clear IDBR Receive Full)
+ * 6. ITE 1 (Clear IDBR Transmit Empty)
+ * 5. ALD 1 (Clear Arbitration Loss Detected)
+ * 4. SSD 1 (Clear Slave Stop Detected)
+ */
+#define I2C_ISR_INIT 0x7FF /* status register init */
+
+struct i2c_slave_client;
+
+struct i2c_pxa_platform_data {
+ unsigned int slave_addr;
+ struct i2c_slave_client *slave;
+ unsigned int class;
+ unsigned int use_pio :1;
+ unsigned int fast_mode :1;
+ unsigned int high_mode:1;
+ unsigned char master_code;
+ unsigned long rate;
+};
+#endif
#define MT7622_TOP_AXI_PROT_EN_WB (BIT(2) | BIT(6) | \
BIT(7) | BIT(8))
-int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask);
-int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask);
-
+int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask,
+ bool reg_update);
+int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask,
+ bool reg_update);
#endif /* __SOC_MEDIATEK_INFRACFG_H */
TEGRA_IO_PAD_BB,
TEGRA_IO_PAD_CAM,
TEGRA_IO_PAD_COMP,
+ TEGRA_IO_PAD_CONN,
TEGRA_IO_PAD_CSIA,
TEGRA_IO_PAD_CSIB,
TEGRA_IO_PAD_CSIC,
TEGRA_IO_PAD_DBG,
TEGRA_IO_PAD_DEBUG_NONAO,
TEGRA_IO_PAD_DMIC,
+ TEGRA_IO_PAD_DMIC_HV,
TEGRA_IO_PAD_DP,
TEGRA_IO_PAD_DSI,
TEGRA_IO_PAD_DSIB,
TEGRA_IO_PAD_DSIC,
TEGRA_IO_PAD_DSID,
+ TEGRA_IO_PAD_EDP,
TEGRA_IO_PAD_EMMC,
TEGRA_IO_PAD_EMMC2,
TEGRA_IO_PAD_GPIO,
TEGRA_IO_PAD_HDMI,
+ TEGRA_IO_PAD_HDMI_DP0,
+ TEGRA_IO_PAD_HDMI_DP1,
TEGRA_IO_PAD_HSIC,
TEGRA_IO_PAD_HV,
TEGRA_IO_PAD_LVDS,
TEGRA_IO_PAD_MIPI_BIAS,
TEGRA_IO_PAD_NAND,
TEGRA_IO_PAD_PEX_BIAS,
+ TEGRA_IO_PAD_PEX_CLK_BIAS,
TEGRA_IO_PAD_PEX_CLK1,
TEGRA_IO_PAD_PEX_CLK2,
+ TEGRA_IO_PAD_PEX_CLK3,
TEGRA_IO_PAD_PEX_CNTRL,
TEGRA_IO_PAD_SDMMC1,
+ TEGRA_IO_PAD_SDMMC1_HV,
+ TEGRA_IO_PAD_SDMMC2,
+ TEGRA_IO_PAD_SDMMC2_HV,
TEGRA_IO_PAD_SDMMC3,
+ TEGRA_IO_PAD_SDMMC3_HV,
TEGRA_IO_PAD_SDMMC4,
TEGRA_IO_PAD_SPI,
TEGRA_IO_PAD_SPI_HV,
TEGRA_IO_PAD_SYS_DDC,
TEGRA_IO_PAD_UART,
+ TEGRA_IO_PAD_UFS,
TEGRA_IO_PAD_USB0,
TEGRA_IO_PAD_USB1,
TEGRA_IO_PAD_USB2,
projects / linux-2.6-block.git / commitdiff