drm/amdgpu/pm: Check input value for power profile setting on smu11, smu13 and smu14

Check the input value for CUSTOM profile mode setting on smu 11,
smu13 and smu14. Otherwise we use uninitialized value of input[]

Signed-off-by: Ma Jun <Jun.Ma2@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
index 6d334a2aff6729cf1303b00e7ad8118db716c7bf..623f6052f97ed73531548dcc6b5390482f11a3b1 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
@@ -1416,6 +1416,9 @@ static int arcturus_set_power_profile_mode(struct smu_context *smu,
 
        if ((profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) &&
             (smu->smc_fw_version >= 0x360d00)) {
+               if (size != 10)
+                       return -EINVAL;
+
                ret = smu_cmn_update_table(smu,
                                       SMU_TABLE_ACTIVITY_MONITOR_COEFF,
                                       WORKLOAD_PPLIB_CUSTOM_BIT,
@@ -1449,6 +1452,8 @@ static int arcturus_set_power_profile_mode(struct smu_context *smu,
                        activity_monitor.Mem_PD_Data_error_coeff = input[8];
                        activity_monitor.Mem_PD_Data_error_rate_coeff = input[9];
                        break;
+               default:
+                       return -EINVAL;
                }
 
                ret = smu_cmn_update_table(smu,

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index c06e0d6e30177498062594744507578f3e7ad11c..01039cdd456b06597f2d567475246d51be0fb514 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -2021,6 +2021,8 @@ static int navi10_set_power_profile_mode(struct smu_context *smu, long *input, u
        }
 
        if (smu->power_profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) {
+               if (size != 10)
+                       return -EINVAL;
 
                ret = smu_cmn_update_table(smu,
                                       SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT,
@@ -2064,6 +2066,8 @@ static int navi10_set_power_profile_mode(struct smu_context *smu, long *input, u
                        activity_monitor.Mem_PD_Data_error_coeff = input[8];
                        activity_monitor.Mem_PD_Data_error_rate_coeff = input[9];
                        break;
+               default:
+                       return -EINVAL;
                }
 
                ret = smu_cmn_update_table(smu,

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index e426f457a017f7751bf5b13f28571baca6de1424..d5a21d7836cc6321485605153c51cbab91734d28 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -1722,6 +1722,8 @@ static int sienna_cichlid_set_power_profile_mode(struct smu_context *smu, long *
        }
 
        if (smu->power_profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) {
+               if (size != 10)
+                       return -EINVAL;
 
                ret = smu_cmn_update_table(smu,
                                       SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT,
@@ -1765,6 +1767,8 @@ static int sienna_cichlid_set_power_profile_mode(struct smu_context *smu, long *
                        activity_monitor->Mem_PD_Data_error_coeff = input[8];
                        activity_monitor->Mem_PD_Data_error_rate_coeff = input[9];
                        break;
+               default:
+                       return -EINVAL;
                }
 
                ret = smu_cmn_update_table(smu,

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index 1e09d5f2d82fe4d9f2ce376bc904634e32f7ca76..f7e756ca36dcd9d4dfb3f7c134e383ff445050f6 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -2495,6 +2495,9 @@ static int smu_v13_0_0_set_power_profile_mode(struct smu_context *smu,
        }
 
        if (smu->power_profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) {
+               if (size != 9)
+                       return -EINVAL;
+
                ret = smu_cmn_update_table(smu,
                                           SMU_TABLE_ACTIVITY_MONITOR_COEFF,
                                           WORKLOAD_PPLIB_CUSTOM_BIT,
@@ -2526,6 +2529,8 @@ static int smu_v13_0_0_set_power_profile_mode(struct smu_context *smu,
                        activity_monitor->Fclk_PD_Data_error_coeff = input[7];
                        activity_monitor->Fclk_PD_Data_error_rate_coeff = input[8];
                        break;
+               default:
+                       return -EINVAL;
                }
 
                ret = smu_cmn_update_table(smu,

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
index e996a0a4d33e105eb26e2705fbef0a6b0b267c2b..4f98869e028488909b66251e030e34f3e908d797 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
@@ -2450,6 +2450,8 @@ static int smu_v13_0_7_set_power_profile_mode(struct smu_context *smu, long *inp
        }
 
        if (smu->power_profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) {
+               if (size != 8)
+                       return -EINVAL;
 
                ret = smu_cmn_update_table(smu,
                                       SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT,
@@ -2478,6 +2480,8 @@ static int smu_v13_0_7_set_power_profile_mode(struct smu_context *smu, long *inp
                        activity_monitor->Fclk_MinActiveFreq = input[6];
                        activity_monitor->Fclk_BoosterFreq = input[7];
                        break;
+               default:
+                       return -EINVAL;
                }
 
                ret = smu_cmn_update_table(smu,

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
index fb6f3bbe2a67e223c057d353543b59ee77ca436b..c22be56024d1ae481f42ced2a2e9bea563a4bf6c 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
@@ -1418,6 +1418,9 @@ static int smu_v14_0_2_set_power_profile_mode(struct smu_context *smu,
        }
 
        if (smu->power_profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) {
+               if (size != 9)
+                       return -EINVAL;
+
                ret = smu_cmn_update_table(smu,
                                           SMU_TABLE_ACTIVITY_MONITOR_COEFF,
                                           WORKLOAD_PPLIB_CUSTOM_BIT,
@@ -1449,6 +1452,8 @@ static int smu_v14_0_2_set_power_profile_mode(struct smu_context *smu,
                        activity_monitor->Fclk_PD_Data_error_coeff = input[7];
                        activity_monitor->Fclk_PD_Data_error_rate_coeff = input[8];
                        break;
+               default:
+                       return -EINVAL;
                }
 
                ret = smu_cmn_update_table(smu,