ASoC: Intel: avs: Ignore Vendor-space manipulation for ACE

A number of Vendor Specific registers utilized on cAVS architecture
(SkyLake till RaptorLake) are not present on ACE hardware (MeteorLake
onward). Similarly, certain recommended procedures do not apply. Adjust
existing code to be ACE-friendly.

Reviewed-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Acked-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Link: https://patch.msgid.link/20250407112352.3720779-3-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/intel/avs/avs.h b/sound/soc/intel/avs/avs.h
index 585543f872fccc0e4d82a4799aea5dbc4600b88e..91872d1df97a5c2408d74cac802e7f64aa9dd3c9 100644 (file)
--- a/sound/soc/intel/avs/avs.h
+++ b/sound/soc/intel/avs/avs.h
@@ -72,6 +72,7 @@ extern const struct avs_dsp_ops avs_tgl_dsp_ops;
 
 #define AVS_PLATATTR_CLDMA             BIT_ULL(0)
 #define AVS_PLATATTR_IMR               BIT_ULL(1)
+#define AVS_PLATATTR_ACE               BIT_ULL(2)
 
 #define avs_platattr_test(adev, attr) \
        ((adev)->spec->attributes & AVS_PLATATTR_##attr)

diff --git a/sound/soc/intel/avs/core.c b/sound/soc/intel/avs/core.c
index 8fbf33e30dfc3e1c6dd713692451475800575f74..72a14dca1a1edf4f620881aaf457256f008d64ea 100644 (file)
--- a/sound/soc/intel/avs/core.c
+++ b/sound/soc/intel/avs/core.c
@@ -54,14 +54,17 @@ void avs_hda_power_gating_enable(struct avs_dev *adev, bool enable)
 {
        u32 value = enable ? 0 : pgctl_mask;
 
-       avs_hda_update_config_dword(&adev->base.core, AZX_PCIREG_PGCTL, pgctl_mask, value);
+       if (!avs_platattr_test(adev, ACE))
+               avs_hda_update_config_dword(&adev->base.core, AZX_PCIREG_PGCTL, pgctl_mask, value);
 }
 
 static void avs_hdac_clock_gating_enable(struct hdac_bus *bus, bool enable)
 {
+       struct avs_dev *adev = hdac_to_avs(bus);
        u32 value = enable ? cgctl_mask : 0;
 
-       avs_hda_update_config_dword(bus, AZX_PCIREG_CGCTL, cgctl_mask, value);
+       if (!avs_platattr_test(adev, ACE))
+               avs_hda_update_config_dword(bus, AZX_PCIREG_CGCTL, cgctl_mask, value);
 }
 
 void avs_hda_clock_gating_enable(struct avs_dev *adev, bool enable)
@@ -71,6 +74,8 @@ void avs_hda_clock_gating_enable(struct avs_dev *adev, bool enable)
 
 void avs_hda_l1sen_enable(struct avs_dev *adev, bool enable)
 {
+       if (avs_platattr_test(adev, ACE))
+               return;
        if (enable) {
                if (atomic_inc_and_test(&adev->l1sen_counter))
                        snd_hdac_chip_updatel(&adev->base.core, VS_EM2, AZX_VS_EM2_L1SEN,
@@ -99,6 +104,7 @@ static int avs_hdac_bus_init_streams(struct hdac_bus *bus)
 
 static bool avs_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset)
 {
+       struct avs_dev *adev = hdac_to_avs(bus);
        struct hdac_ext_link *hlink;
        bool ret;
 
@@ -114,7 +120,8 @@ static bool avs_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset)
        /* Set DUM bit to address incorrect position reporting for capture
         * streams. In order to do so, CTRL needs to be out of reset state
         */
-       snd_hdac_chip_updatel(bus, VS_EM2, AZX_VS_EM2_DUM, AZX_VS_EM2_DUM);
+       if (!avs_platattr_test(adev, ACE))
+               snd_hdac_chip_updatel(bus, VS_EM2, AZX_VS_EM2_DUM, AZX_VS_EM2_DUM);
 
        return ret;
 }