ARM: dts: aspeed: Add PECI controller nodes

Add PECI controller nodes with all required information.

Co-developed-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
Link: https://lore.kernel.org/r/20220208153639.255278-4-iwona.winiarska@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index f14dace34c5aae0ea536bed890548a51e5bad487..fa8b581c3d6c1f1f1c3e9bd1b7bef6ad506783b0 100644 (file)
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -392,6 +392,17 @@
                                };
                        };
 
+                       peci0: peci-controller@1e78b000 {
+                               compatible = "aspeed,ast2400-peci";
+                               reg = <0x1e78b000 0x60>;
+                               interrupts = <15>;
+                               clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
+                               resets = <&syscon ASPEED_RESET_PECI>;
+                               cmd-timeout-ms = <1000>;
+                               clock-frequency = <1000000>;
+                               status = "disabled";
+                       };
+
                        uart2: serial@1e78d000 {
                                compatible = "ns16550a";
                                reg = <0x1e78d000 0x20>;

diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 7495f93c5069f3e20a1a07b2ef0555c840b5db8f..4147b397c88309e7d93df3d861dc58f6d926c26f 100644 (file)
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -516,6 +516,17 @@
                                };
                        };
 
+                       peci0: peci-controller@1e78b000 {
+                               compatible = "aspeed,ast2500-peci";
+                               reg = <0x1e78b000 0x60>;
+                               interrupts = <15>;
+                               clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
+                               resets = <&syscon ASPEED_RESET_PECI>;
+                               cmd-timeout-ms = <1000>;
+                               clock-frequency = <1000000>;
+                               status = "disabled";
+                       };
+
                        uart2: serial@1e78d000 {
                                compatible = "ns16550a";
                                reg = <0x1e78d000 0x20>;

diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index c32e87fad4dc90be4bc2d916e4c6c495ee857664..3d5ce9da42c3c2bc282f1df808ae6161e086cba0 100644 (file)
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -512,6 +512,17 @@
                                status = "disabled";
                        };
 
+                       peci0: peci-controller@1e78b000 {
+                               compatible = "aspeed,ast2600-peci";
+                               reg = <0x1e78b000 0x100>;
+                               interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>;
+                               resets = <&syscon ASPEED_RESET_PECI>;
+                               cmd-timeout-ms = <1000>;
+                               clock-frequency = <1000000>;
+                               status = "disabled";
+                       };
+
                        lpc: lpc@1e789000 {
                                compatible = "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon";
                                reg = <0x1e789000 0x1000>;