.mac_step = IWL_CFG_ANY, \
.rf_type = IWL_CFG_ANY, \
.rf_step = IWL_CFG_ANY, \
- .bw_limit = IWL_CFG_BW_ANY, \
+ .bw_limit = IWL_CFG_ANY, \
.jacket = IWL_CFG_ANY, \
.cores = IWL_CFG_ANY, \
.rf_id = IWL_CFG_ANY, \
#define RF_ID(n) .rf_id = IWL_CFG_RF_ID_##n
#define NO_CDB .cdb = IWL_CFG_NO_CDB
#define CDB .cdb = IWL_CFG_CDB
-#define BW_NO_LIMIT .bw_limit = IWL_CFG_BW_NO_LIM
-#define BW_LIMIT(n) .bw_limit = (n)
+#define BW_NO_LIMIT .bw_limit = 0
+#define BW_LIMITED .bw_limit = 1
VISIBLE_IF_IWLWIFI_KUNIT const struct iwl_dev_info iwl_dev_info_table[] = {
#if IS_ENABLED(CONFIG_IWLMVM)
/* 9000 */
IWL_DEV_INFO(iwl9260_2ac_cfg, iwl9260_killer_1550_name,
- DEVICE(0x2526), SUBDEV(0x1550), BW_NO_LIMIT),
+ DEVICE(0x2526), SUBDEV(0x1550)),
IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name,
- DEVICE(0x2526), SUBDEV(0x1551), BW_NO_LIMIT),
+ DEVICE(0x2526), SUBDEV(0x1551)),
IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name,
- DEVICE(0x2526), SUBDEV(0x1552), BW_NO_LIMIT),
+ DEVICE(0x2526), SUBDEV(0x1552)),
IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name,
- DEVICE(0x30DC), SUBDEV(0x1551), BW_NO_LIMIT),
+ DEVICE(0x30DC), SUBDEV(0x1551)),
IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name,
- DEVICE(0x30DC), SUBDEV(0x1552), BW_NO_LIMIT),
+ DEVICE(0x30DC), SUBDEV(0x1552)),
IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name,
- DEVICE(0x31DC), SUBDEV(0x1551), BW_NO_LIMIT),
+ DEVICE(0x31DC), SUBDEV(0x1551)),
IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name,
- DEVICE(0x31DC), SUBDEV(0x1552), BW_NO_LIMIT),
+ DEVICE(0x31DC), SUBDEV(0x1552)),
IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name,
- DEVICE(0xA370), SUBDEV(0x1551), BW_NO_LIMIT),
+ DEVICE(0xA370), SUBDEV(0x1551)),
IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name,
- DEVICE(0xA370), SUBDEV(0x1552), BW_NO_LIMIT),
+ DEVICE(0xA370), SUBDEV(0x1552)),
IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_160_name,
- DEVICE(0x54F0), SUBDEV(0x1551), BW_NO_LIMIT),
+ DEVICE(0x54F0), SUBDEV(0x1551)),
IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name,
- DEVICE(0x54F0), SUBDEV(0x1552), BW_NO_LIMIT),
+ DEVICE(0x54F0), SUBDEV(0x1552)),
IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_160_name,
- DEVICE(0x51F0), SUBDEV(0x1552), BW_NO_LIMIT),
+ DEVICE(0x51F0), SUBDEV(0x1552)),
IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_160_name,
- DEVICE(0x51F0), SUBDEV(0x1551), BW_NO_LIMIT),
+ DEVICE(0x51F0), SUBDEV(0x1551)),
IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690s_name,
- DEVICE(0x51F0), SUBDEV(0x1691), BW_NO_LIMIT),
+ DEVICE(0x51F0), SUBDEV(0x1691)),
IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690i_name,
- DEVICE(0x51F0), SUBDEV(0x1692), BW_NO_LIMIT),
+ DEVICE(0x51F0), SUBDEV(0x1692)),
IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690i_name,
- DEVICE(0x51F1), SUBDEV(0x1692), BW_NO_LIMIT),
+ DEVICE(0x51F1), SUBDEV(0x1692)),
IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690s_name,
- DEVICE(0x54F0), SUBDEV(0x1691), BW_NO_LIMIT),
+ DEVICE(0x54F0), SUBDEV(0x1691)),
IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690i_name,
- DEVICE(0x54F0), SUBDEV(0x1692), BW_NO_LIMIT),
+ DEVICE(0x54F0), SUBDEV(0x1692)),
IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690s_name,
- DEVICE(0x7A70), SUBDEV(0x1691), BW_NO_LIMIT),
+ DEVICE(0x7A70), SUBDEV(0x1691)),
IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690i_name,
- DEVICE(0x7A70), SUBDEV(0x1692), BW_NO_LIMIT),
+ DEVICE(0x7A70), SUBDEV(0x1692)),
IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690s_name,
- DEVICE(0x7AF0), SUBDEV(0x1691), BW_NO_LIMIT),
+ DEVICE(0x7AF0), SUBDEV(0x1691)),
IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690i_name,
- DEVICE(0x7AF0), SUBDEV(0x1692), BW_NO_LIMIT),
+ DEVICE(0x7AF0), SUBDEV(0x1692)),
IWL_DEV_INFO(iwl9260_2ac_cfg, iwl9260_1_name,
- DEVICE(0x271C), SUBDEV(0x0214), BW_NO_LIMIT),
+ DEVICE(0x271C), SUBDEV(0x0214)),
IWL_DEV_INFO(iwl_cfg_ma, iwl_ax411_killer_1690s_name,
- DEVICE(0x7E40), SUBDEV(0x1691), BW_NO_LIMIT),
+ DEVICE(0x7E40), SUBDEV(0x1691)),
IWL_DEV_INFO(iwl_cfg_ma, iwl_ax411_killer_1690i_name,
- DEVICE(0x7E40), SUBDEV(0x1692), BW_NO_LIMIT),
+ DEVICE(0x7E40), SUBDEV(0x1692)),
/* AX200 */
IWL_DEV_INFO(iwl_ax200_cfg_cc, iwl_ax200_name,
- DEVICE(0x2723), BW_NO_LIMIT),
+ DEVICE(0x2723)),
IWL_DEV_INFO(iwl_ax200_cfg_cc, iwl_ax200_killer_1650w_name,
- DEVICE(0x2723), SUBDEV(0x1653), BW_NO_LIMIT),
+ DEVICE(0x2723), SUBDEV(0x1653)),
IWL_DEV_INFO(iwl_ax200_cfg_cc, iwl_ax200_killer_1650x_name,
- DEVICE(0x2723), SUBDEV(0x1654), BW_NO_LIMIT),
+ DEVICE(0x2723), SUBDEV(0x1654)),
/* Qu with Hr */
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x43F0), SUBDEV(0x0070), BW_NO_LIMIT),
+ DEVICE(0x43F0), SUBDEV(0x0070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x43F0), SUBDEV(0x0074), BW_NO_LIMIT),
+ DEVICE(0x43F0), SUBDEV(0x0074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x43F0), SUBDEV(0x0078), BW_NO_LIMIT),
+ DEVICE(0x43F0), SUBDEV(0x0078)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x43F0), SUBDEV(0x007C), BW_NO_LIMIT),
+ DEVICE(0x43F0), SUBDEV(0x007C)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650s_name,
- DEVICE(0x43F0), SUBDEV(0x1651), BW_NO_LIMIT),
+ DEVICE(0x43F0), SUBDEV(0x1651)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650i_name,
- DEVICE(0x43F0), SUBDEV(0x1652), BW_NO_LIMIT),
+ DEVICE(0x43F0), SUBDEV(0x1652)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x43F0), SUBDEV(0x2074), BW_NO_LIMIT),
+ DEVICE(0x43F0), SUBDEV(0x2074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x43F0), SUBDEV(0x4070), BW_NO_LIMIT),
+ DEVICE(0x43F0), SUBDEV(0x4070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0xA0F0), SUBDEV(0x0070), BW_NO_LIMIT),
+ DEVICE(0xA0F0), SUBDEV(0x0070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0xA0F0), SUBDEV(0x0074), BW_NO_LIMIT),
+ DEVICE(0xA0F0), SUBDEV(0x0074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0xA0F0), SUBDEV(0x0078), BW_NO_LIMIT),
+ DEVICE(0xA0F0), SUBDEV(0x0078)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0xA0F0), SUBDEV(0x007C), BW_NO_LIMIT),
+ DEVICE(0xA0F0), SUBDEV(0x007C)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0xA0F0), SUBDEV(0x0A10), BW_NO_LIMIT),
+ DEVICE(0xA0F0), SUBDEV(0x0A10)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650s_name,
- DEVICE(0xA0F0), SUBDEV(0x1651), BW_NO_LIMIT),
+ DEVICE(0xA0F0), SUBDEV(0x1651)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650i_name,
- DEVICE(0xA0F0), SUBDEV(0x1652), BW_NO_LIMIT),
+ DEVICE(0xA0F0), SUBDEV(0x1652)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0xA0F0), SUBDEV(0x2074), BW_NO_LIMIT),
+ DEVICE(0xA0F0), SUBDEV(0x2074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0xA0F0), SUBDEV(0x4070), BW_NO_LIMIT),
+ DEVICE(0xA0F0), SUBDEV(0x4070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0xA0F0), SUBDEV(0x6074), BW_NO_LIMIT),
+ DEVICE(0xA0F0), SUBDEV(0x6074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x02F0), SUBDEV(0x0070), BW_NO_LIMIT),
+ DEVICE(0x02F0), SUBDEV(0x0070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x02F0), SUBDEV(0x0074), BW_NO_LIMIT),
+ DEVICE(0x02F0), SUBDEV(0x0074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x02F0), SUBDEV(0x6074), BW_NO_LIMIT),
+ DEVICE(0x02F0), SUBDEV(0x6074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x02F0), SUBDEV(0x0078), BW_NO_LIMIT),
+ DEVICE(0x02F0), SUBDEV(0x0078)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x02F0), SUBDEV(0x007C), BW_NO_LIMIT),
+ DEVICE(0x02F0), SUBDEV(0x007C)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x02F0), SUBDEV(0x0310), BW_NO_LIMIT),
+ DEVICE(0x02F0), SUBDEV(0x0310)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650s_name,
- DEVICE(0x02F0), SUBDEV(0x1651), BW_NO_LIMIT),
+ DEVICE(0x02F0), SUBDEV(0x1651)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650i_name,
- DEVICE(0x02F0), SUBDEV(0x1652), BW_NO_LIMIT),
+ DEVICE(0x02F0), SUBDEV(0x1652)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x02F0), SUBDEV(0x2074), BW_NO_LIMIT),
+ DEVICE(0x02F0), SUBDEV(0x2074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x02F0), SUBDEV(0x4070), BW_NO_LIMIT),
+ DEVICE(0x02F0), SUBDEV(0x4070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x06F0), SUBDEV(0x0070), BW_NO_LIMIT),
+ DEVICE(0x06F0), SUBDEV(0x0070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x06F0), SUBDEV(0x0074), BW_NO_LIMIT),
+ DEVICE(0x06F0), SUBDEV(0x0074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x06F0), SUBDEV(0x0078), BW_NO_LIMIT),
+ DEVICE(0x06F0), SUBDEV(0x0078)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x06F0), SUBDEV(0x007C), BW_NO_LIMIT),
+ DEVICE(0x06F0), SUBDEV(0x007C)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x06F0), SUBDEV(0x0310), BW_NO_LIMIT),
+ DEVICE(0x06F0), SUBDEV(0x0310)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650s_name,
- DEVICE(0x06F0), SUBDEV(0x1651), BW_NO_LIMIT),
+ DEVICE(0x06F0), SUBDEV(0x1651)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650i_name,
- DEVICE(0x06F0), SUBDEV(0x1652), BW_NO_LIMIT),
+ DEVICE(0x06F0), SUBDEV(0x1652)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x06F0), SUBDEV(0x2074), BW_NO_LIMIT),
+ DEVICE(0x06F0), SUBDEV(0x2074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x06F0), SUBDEV(0x4070), BW_NO_LIMIT),
+ DEVICE(0x06F0), SUBDEV(0x4070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x34F0), SUBDEV(0x0070), BW_NO_LIMIT),
+ DEVICE(0x34F0), SUBDEV(0x0070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x34F0), SUBDEV(0x0074), BW_NO_LIMIT),
+ DEVICE(0x34F0), SUBDEV(0x0074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x34F0), SUBDEV(0x0078), BW_NO_LIMIT),
+ DEVICE(0x34F0), SUBDEV(0x0078)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x34F0), SUBDEV(0x007C), BW_NO_LIMIT),
+ DEVICE(0x34F0), SUBDEV(0x007C)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x34F0), SUBDEV(0x0310), BW_NO_LIMIT),
+ DEVICE(0x34F0), SUBDEV(0x0310)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650s_name,
- DEVICE(0x34F0), SUBDEV(0x1651), BW_NO_LIMIT),
+ DEVICE(0x34F0), SUBDEV(0x1651)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650i_name,
- DEVICE(0x34F0), SUBDEV(0x1652), BW_NO_LIMIT),
+ DEVICE(0x34F0), SUBDEV(0x1652)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x34F0), SUBDEV(0x2074), BW_NO_LIMIT),
+ DEVICE(0x34F0), SUBDEV(0x2074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x34F0), SUBDEV(0x4070), BW_NO_LIMIT),
+ DEVICE(0x34F0), SUBDEV(0x4070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x3DF0), SUBDEV(0x0070), BW_NO_LIMIT),
+ DEVICE(0x3DF0), SUBDEV(0x0070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x3DF0), SUBDEV(0x0074), BW_NO_LIMIT),
+ DEVICE(0x3DF0), SUBDEV(0x0074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x3DF0), SUBDEV(0x0078), BW_NO_LIMIT),
+ DEVICE(0x3DF0), SUBDEV(0x0078)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x3DF0), SUBDEV(0x007C), BW_NO_LIMIT),
+ DEVICE(0x3DF0), SUBDEV(0x007C)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x3DF0), SUBDEV(0x0310), BW_NO_LIMIT),
+ DEVICE(0x3DF0), SUBDEV(0x0310)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650s_name,
- DEVICE(0x3DF0), SUBDEV(0x1651), BW_NO_LIMIT),
+ DEVICE(0x3DF0), SUBDEV(0x1651)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650i_name,
- DEVICE(0x3DF0), SUBDEV(0x1652), BW_NO_LIMIT),
+ DEVICE(0x3DF0), SUBDEV(0x1652)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x3DF0), SUBDEV(0x2074), BW_NO_LIMIT),
+ DEVICE(0x3DF0), SUBDEV(0x2074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x3DF0), SUBDEV(0x4070), BW_NO_LIMIT),
+ DEVICE(0x3DF0), SUBDEV(0x4070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x4DF0), SUBDEV(0x0070), BW_NO_LIMIT),
+ DEVICE(0x4DF0), SUBDEV(0x0070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x4DF0), SUBDEV(0x0074), BW_NO_LIMIT),
+ DEVICE(0x4DF0), SUBDEV(0x0074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x4DF0), SUBDEV(0x0078), BW_NO_LIMIT),
+ DEVICE(0x4DF0), SUBDEV(0x0078)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x4DF0), SUBDEV(0x007C), BW_NO_LIMIT),
+ DEVICE(0x4DF0), SUBDEV(0x007C)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x4DF0), SUBDEV(0x0310), BW_NO_LIMIT),
+ DEVICE(0x4DF0), SUBDEV(0x0310)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650s_name,
- DEVICE(0x4DF0), SUBDEV(0x1651), BW_NO_LIMIT),
+ DEVICE(0x4DF0), SUBDEV(0x1651)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650i_name,
- DEVICE(0x4DF0), SUBDEV(0x1652), BW_NO_LIMIT),
+ DEVICE(0x4DF0), SUBDEV(0x1652)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x4DF0), SUBDEV(0x2074), BW_NO_LIMIT),
+ DEVICE(0x4DF0), SUBDEV(0x2074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x4DF0), SUBDEV(0x4070), BW_NO_LIMIT),
+ DEVICE(0x4DF0), SUBDEV(0x4070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
- DEVICE(0x4DF0), SUBDEV(0x6074), BW_NO_LIMIT),
+ DEVICE(0x4DF0), SUBDEV(0x6074)),
/* So with HR */
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, NULL,
- DEVICE(0x2725), SUBDEV(0x0090), BW_NO_LIMIT),
+ DEVICE(0x2725), SUBDEV(0x0090)),
IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL,
- DEVICE(0x2725), SUBDEV(0x0020), BW_NO_LIMIT),
+ DEVICE(0x2725), SUBDEV(0x0020)),
IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL,
- DEVICE(0x2725), SUBDEV(0x2020), BW_NO_LIMIT),
+ DEVICE(0x2725), SUBDEV(0x2020)),
IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL,
- DEVICE(0x2725), SUBDEV(0x0024), BW_NO_LIMIT),
+ DEVICE(0x2725), SUBDEV(0x0024)),
IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL,
- DEVICE(0x2725), SUBDEV(0x0310), BW_NO_LIMIT),
+ DEVICE(0x2725), SUBDEV(0x0310)),
IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL,
- DEVICE(0x2725), SUBDEV(0x0510), BW_NO_LIMIT),
+ DEVICE(0x2725), SUBDEV(0x0510)),
IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL,
- DEVICE(0x2725), SUBDEV(0x0A10), BW_NO_LIMIT),
+ DEVICE(0x2725), SUBDEV(0x0A10)),
IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL,
- DEVICE(0x2725), SUBDEV(0xE020), BW_NO_LIMIT),
+ DEVICE(0x2725), SUBDEV(0xE020)),
IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL,
- DEVICE(0x2725), SUBDEV(0xE024), BW_NO_LIMIT),
+ DEVICE(0x2725), SUBDEV(0xE024)),
IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL,
- DEVICE(0x2725), SUBDEV(0x4020), BW_NO_LIMIT),
+ DEVICE(0x2725), SUBDEV(0x4020)),
IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL,
- DEVICE(0x2725), SUBDEV(0x6020), BW_NO_LIMIT),
+ DEVICE(0x2725), SUBDEV(0x6020)),
IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL,
- DEVICE(0x2725), SUBDEV(0x6024), BW_NO_LIMIT),
+ DEVICE(0x2725), SUBDEV(0x6024)),
IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, iwl_ax210_killer_1675w_name,
- DEVICE(0x2725), SUBDEV(0x1673), BW_NO_LIMIT),
+ DEVICE(0x2725), SUBDEV(0x1673)),
IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, iwl_ax210_killer_1675x_name,
- DEVICE(0x2725), SUBDEV(0x1674), BW_NO_LIMIT),
+ DEVICE(0x2725), SUBDEV(0x1674)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0_long, NULL,
- DEVICE(0x7A70), SUBDEV(0x0090), BW_NO_LIMIT),
+ DEVICE(0x7A70), SUBDEV(0x0090)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0_long, NULL,
- DEVICE(0x7A70), SUBDEV(0x0098), BW_NO_LIMIT),
+ DEVICE(0x7A70), SUBDEV(0x0098)),
IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0_long, NULL,
- DEVICE(0x7A70), SUBDEV(0x00B0), BW_NO_LIMIT),
+ DEVICE(0x7A70), SUBDEV(0x00B0)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0_long, NULL,
- DEVICE(0x7A70), SUBDEV(0x0310), BW_NO_LIMIT),
+ DEVICE(0x7A70), SUBDEV(0x0310)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0_long, NULL,
- DEVICE(0x7A70), SUBDEV(0x0510), BW_NO_LIMIT),
+ DEVICE(0x7A70), SUBDEV(0x0510)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0_long, NULL,
- DEVICE(0x7A70), SUBDEV(0x0A10), BW_NO_LIMIT),
+ DEVICE(0x7A70), SUBDEV(0x0A10)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, NULL,
- DEVICE(0x7AF0), SUBDEV(0x0090), BW_NO_LIMIT),
+ DEVICE(0x7AF0), SUBDEV(0x0090)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, NULL,
- DEVICE(0x7AF0), SUBDEV(0x0098), BW_NO_LIMIT),
+ DEVICE(0x7AF0), SUBDEV(0x0098)),
IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, NULL,
- DEVICE(0x7AF0), SUBDEV(0x00B0), BW_NO_LIMIT),
+ DEVICE(0x7AF0), SUBDEV(0x00B0)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, NULL,
- DEVICE(0x7AF0), SUBDEV(0x0310), BW_NO_LIMIT),
+ DEVICE(0x7AF0), SUBDEV(0x0310)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, NULL,
- DEVICE(0x7AF0), SUBDEV(0x0510), BW_NO_LIMIT),
+ DEVICE(0x7AF0), SUBDEV(0x0510)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, NULL,
- DEVICE(0x7AF0), SUBDEV(0x0A10), BW_NO_LIMIT),
+ DEVICE(0x7AF0), SUBDEV(0x0A10)),
/* So with JF */
IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_160_name,
- DEVICE(0x7A70), SUBDEV(0x1551), BW_NO_LIMIT),
+ DEVICE(0x7A70), SUBDEV(0x1551)),
IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_160_name,
- DEVICE(0x7A70), SUBDEV(0x1552), BW_NO_LIMIT),
+ DEVICE(0x7A70), SUBDEV(0x1552)),
IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_160_name,
- DEVICE(0x7AF0), SUBDEV(0x1551), BW_NO_LIMIT),
+ DEVICE(0x7AF0), SUBDEV(0x1551)),
IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_160_name,
- DEVICE(0x7AF0), SUBDEV(0x1552), BW_NO_LIMIT),
+ DEVICE(0x7AF0), SUBDEV(0x1552)),
/* SO with GF2 */
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name,
- DEVICE(0x2726), SUBDEV(0x1671), BW_NO_LIMIT),
+ DEVICE(0x2726), SUBDEV(0x1671)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name,
- DEVICE(0x2726), SUBDEV(0x1672), BW_NO_LIMIT),
+ DEVICE(0x2726), SUBDEV(0x1672)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name,
- DEVICE(0x51F0), SUBDEV(0x1671), BW_NO_LIMIT),
+ DEVICE(0x51F0), SUBDEV(0x1671)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name,
- DEVICE(0x51F0), SUBDEV(0x1672), BW_NO_LIMIT),
+ DEVICE(0x51F0), SUBDEV(0x1672)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name,
- DEVICE(0x51F1), SUBDEV(0x1671), BW_NO_LIMIT),
+ DEVICE(0x51F1), SUBDEV(0x1671)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name,
- DEVICE(0x51F1), SUBDEV(0x1672), BW_NO_LIMIT),
+ DEVICE(0x51F1), SUBDEV(0x1672)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name,
- DEVICE(0x54F0), SUBDEV(0x1671), BW_NO_LIMIT),
+ DEVICE(0x54F0), SUBDEV(0x1671)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name,
- DEVICE(0x54F0), SUBDEV(0x1672), BW_NO_LIMIT),
+ DEVICE(0x54F0), SUBDEV(0x1672)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name,
- DEVICE(0x7A70), SUBDEV(0x1671), BW_NO_LIMIT),
+ DEVICE(0x7A70), SUBDEV(0x1671)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name,
- DEVICE(0x7A70), SUBDEV(0x1672), BW_NO_LIMIT),
+ DEVICE(0x7A70), SUBDEV(0x1672)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name,
- DEVICE(0x7AF0), SUBDEV(0x1671), BW_NO_LIMIT),
+ DEVICE(0x7AF0), SUBDEV(0x1671)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name,
- DEVICE(0x7AF0), SUBDEV(0x1672), BW_NO_LIMIT),
+ DEVICE(0x7AF0), SUBDEV(0x1672)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name,
- DEVICE(0x7F70), SUBDEV(0x1671), BW_NO_LIMIT),
+ DEVICE(0x7F70), SUBDEV(0x1671)),
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name,
- DEVICE(0x7F70), SUBDEV(0x1672), BW_NO_LIMIT),
+ DEVICE(0x7F70), SUBDEV(0x1672)),
/* MA with GF2 */
IWL_DEV_INFO(iwl_cfg_ma, iwl_ax211_killer_1675s_name,
- DEVICE(0x7E40), SUBDEV(0x1671), BW_NO_LIMIT),
+ DEVICE(0x7E40), SUBDEV(0x1671)),
IWL_DEV_INFO(iwl_cfg_ma, iwl_ax211_killer_1675i_name,
- DEVICE(0x7E40), SUBDEV(0x1672), BW_NO_LIMIT),
+ DEVICE(0x7E40), SUBDEV(0x1672)),
IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9461_160_name, MAC_TYPE(PU),
RF_TYPE(JF1), RF_ID(JF1),
BW_NO_LIMIT, CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9461_name, MAC_TYPE(PU),
+ IWL_DEV_INFO(iwl9560_2ac_cfg_soc_80mhz, iwl9461_name, MAC_TYPE(PU),
RF_TYPE(JF1), RF_ID(JF1),
- BW_LIMIT(80), CORES(BT), NO_CDB),
+ BW_LIMITED, CORES(BT), NO_CDB),
IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9462_160_name, MAC_TYPE(PU),
RF_TYPE(JF1), RF_ID(JF1_DIV),
BW_NO_LIMIT, CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9462_name, MAC_TYPE(PU),
+ IWL_DEV_INFO(iwl9560_2ac_cfg_soc_80mhz, iwl9462_name, MAC_TYPE(PU),
RF_TYPE(JF1), RF_ID(JF1_DIV),
- BW_LIMIT(80), CORES(BT), NO_CDB),
+ BW_LIMITED, CORES(BT), NO_CDB),
IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_160_name, MAC_TYPE(PU),
RF_TYPE(JF2), RF_ID(JF),
BW_NO_LIMIT, CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_name, MAC_TYPE(PU),
+ IWL_DEV_INFO(iwl9560_2ac_cfg_soc_80mhz, iwl9560_name, MAC_TYPE(PU),
RF_TYPE(JF2), RF_ID(JF),
- BW_LIMIT(80), CORES(BT), NO_CDB),
+ BW_LIMITED, CORES(BT), NO_CDB),
IWL_DEV_INFO(iwl9260_2ac_cfg, iwl9270_160_name, DEVICE(0x2526),
MAC_TYPE(TH), RF_TYPE(JF2),
BW_NO_LIMIT, CORES(BT_GNSS), NO_CDB),
- IWL_DEV_INFO(iwl9260_2ac_cfg, iwl9270_name, DEVICE(0x2526),
+ IWL_DEV_INFO(iwl9260_2ac_cfg_80mhz, iwl9270_name, DEVICE(0x2526),
MAC_TYPE(TH), RF_TYPE(JF2),
- BW_LIMIT(80), CORES(BT_GNSS), NO_CDB),
+ BW_LIMITED, CORES(BT_GNSS), NO_CDB),
IWL_DEV_INFO(iwl9260_2ac_cfg, iwl9162_160_name, DEVICE(0x271B),
MAC_TYPE(TH), RF_TYPE(JF1),
BW_NO_LIMIT, CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwl9260_2ac_cfg, iwl9162_name, DEVICE(0x271B),
+ IWL_DEV_INFO(iwl9260_2ac_cfg_80mhz, iwl9162_name, DEVICE(0x271B),
MAC_TYPE(TH), RF_TYPE(JF1),
- BW_LIMIT(80), CORES(BT), NO_CDB),
+ BW_LIMITED, CORES(BT), NO_CDB),
IWL_DEV_INFO(iwl9260_2ac_cfg, iwl9260_160_name, DEVICE(0x2526),
MAC_TYPE(TH), RF_TYPE(JF2),
BW_NO_LIMIT, CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwl9260_2ac_cfg, iwl9260_name, DEVICE(0x2526),
+ IWL_DEV_INFO(iwl9260_2ac_cfg_80mhz, iwl9260_name, DEVICE(0x2526),
MAC_TYPE(TH), RF_TYPE(JF2),
- BW_LIMIT(80), CORES(BT), NO_CDB),
+ BW_LIMITED, CORES(BT), NO_CDB),
/* Qu with Jf */
/* Qu B step */
IWL_DEV_INFO(iwl9560_qu_jf_cfg, iwl9461_160_name,
MAC_TYPE(QU), MAC_STEP(B), RF_TYPE(JF1), RF_ID(JF1),
BW_NO_LIMIT, CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwl9560_qu_jf_cfg, iwl9461_name,
+ IWL_DEV_INFO(iwl9560_qu_jf_cfg_80mhz, iwl9461_name,
MAC_TYPE(QU), MAC_STEP(B), RF_TYPE(JF1), RF_ID(JF1),
- BW_LIMIT(80), CORES(BT), NO_CDB),
+ BW_LIMITED, CORES(BT), NO_CDB),
IWL_DEV_INFO(iwl9560_qu_jf_cfg, iwl9462_160_name,
MAC_TYPE(QU), MAC_STEP(B),
RF_TYPE(JF1), RF_ID(JF1_DIV),
BW_NO_LIMIT, CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwl9560_qu_jf_cfg, iwl9462_name,
+ IWL_DEV_INFO(iwl9560_qu_jf_cfg_80mhz, iwl9462_name,
MAC_TYPE(QU), MAC_STEP(B),
RF_TYPE(JF1), RF_ID(JF1_DIV),
- BW_LIMIT(80), CORES(BT), NO_CDB),
+ BW_LIMITED, CORES(BT), NO_CDB),
IWL_DEV_INFO(iwl9560_qu_jf_cfg, iwl9560_160_name,
MAC_TYPE(QU), MAC_STEP(B),
RF_TYPE(JF2), RF_ID(JF),
BW_NO_LIMIT, CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwl9560_qu_jf_cfg, iwl9560_name,
+ IWL_DEV_INFO(iwl9560_qu_jf_cfg_80mhz, iwl9560_name,
MAC_TYPE(QU), MAC_STEP(B),
RF_TYPE(JF2), RF_ID(JF),
- BW_LIMIT(80), CORES(BT), NO_CDB),
+ BW_LIMITED, CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwl9560_qu_jf_cfg, iwl9560_killer_1550s_name,
- SUBDEV(0x1551), MAC_TYPE(QU), MAC_STEP(B), RF_TYPE(JF2),
- RF_ID(JF), BW_LIMIT(80), CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwl9560_qu_jf_cfg, iwl9560_killer_1550i_name,
- SUBDEV(0x1552), MAC_TYPE(QU), MAC_STEP(B), RF_TYPE(JF2),
- RF_ID(JF), BW_LIMIT(80), CORES(BT), NO_CDB),
+ IWL_DEV_INFO(iwl9560_qu_jf_cfg_80mhz, iwl9560_killer_1550s_name,
+ SUBDEV(0x1551), MAC_TYPE(QU), MAC_STEP(B), RF_TYPE(JF2)),
+ IWL_DEV_INFO(iwl9560_qu_jf_cfg_80mhz, iwl9560_killer_1550i_name,
+ SUBDEV(0x1552), MAC_TYPE(QU), MAC_STEP(B), RF_TYPE(JF2)),
/* Qu C step */
IWL_DEV_INFO(iwl9560_qu_jf_cfg, iwl9461_160_name,
MAC_TYPE(QU), MAC_STEP(C),
RF_TYPE(JF1), RF_ID(JF1),
BW_NO_LIMIT, CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwl9560_qu_jf_cfg, iwl9461_name,
+ IWL_DEV_INFO(iwl9560_qu_jf_cfg_80mhz, iwl9461_name,
MAC_TYPE(QU), MAC_STEP(C),
RF_TYPE(JF1), RF_ID(JF1),
- BW_LIMIT(80), CORES(BT), NO_CDB),
+ BW_LIMITED, CORES(BT), NO_CDB),
IWL_DEV_INFO(iwl9560_qu_jf_cfg, iwl9462_160_name,
MAC_TYPE(QU), MAC_STEP(C),
RF_TYPE(JF1), RF_ID(JF1_DIV),
BW_NO_LIMIT, CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwl9560_qu_jf_cfg, iwl9462_name,
+ IWL_DEV_INFO(iwl9560_qu_jf_cfg_80mhz, iwl9462_name,
MAC_TYPE(QU), MAC_STEP(C),
RF_TYPE(JF1), RF_ID(JF1_DIV),
- BW_LIMIT(80), CORES(BT), NO_CDB),
+ BW_LIMITED, CORES(BT), NO_CDB),
IWL_DEV_INFO(iwl9560_qu_jf_cfg, iwl9560_160_name, MAC_TYPE(QU),
MAC_STEP(C), RF_TYPE(JF2), RF_ID(JF), BW_NO_LIMIT, CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwl9560_qu_jf_cfg, iwl9560_name, MAC_TYPE(QU),
- MAC_STEP(C), RF_TYPE(JF2), RF_ID(JF), BW_LIMIT(80), CORES(BT),
+ IWL_DEV_INFO(iwl9560_qu_jf_cfg_80mhz, iwl9560_name, MAC_TYPE(QU),
+ MAC_STEP(C), RF_TYPE(JF2), RF_ID(JF), BW_LIMITED, CORES(BT),
NO_CDB),
IWL_DEV_INFO(iwl9560_qu_jf_cfg, iwl9560_killer_1550s_name,
- SUBDEV(0x1551), MAC_TYPE(QU), MAC_STEP(C), RF_TYPE(JF2),
- RF_ID(JF), BW_NO_LIMIT, CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwl9560_qu_jf_cfg, iwl9560_killer_1550i_name,
- SUBDEV(0x1552), MAC_TYPE(QU), MAC_STEP(C), RF_TYPE(JF2),
- RF_ID(JF), BW_LIMIT(80), CORES(BT), NO_CDB),
+ SUBDEV(0x1551), MAC_TYPE(QU), MAC_STEP(C), RF_TYPE(JF2)),
+ IWL_DEV_INFO(iwl9560_qu_jf_cfg_80mhz, iwl9560_killer_1550i_name,
+ SUBDEV(0x1552), MAC_TYPE(QU), MAC_STEP(C), RF_TYPE(JF2)),
/* QuZ */
IWL_DEV_INFO(iwl9560_quz_a0_jf_b0_cfg, iwl9461_160_name, MAC_TYPE(QUZ),
RF_TYPE(JF1), RF_ID(JF1), BW_NO_LIMIT, CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwl9560_quz_a0_jf_b0_cfg, iwl9461_name, MAC_TYPE(QUZ),
- RF_TYPE(JF1), RF_ID(JF1), BW_LIMIT(80), CORES(BT), NO_CDB),
+ IWL_DEV_INFO(iwl9560_quz_a0_jf_b0_cfg_80mhz, iwl9461_name, MAC_TYPE(QUZ),
+ RF_TYPE(JF1), RF_ID(JF1), BW_LIMITED, CORES(BT), NO_CDB),
IWL_DEV_INFO(iwl9560_quz_a0_jf_b0_cfg, iwl9462_160_name, MAC_TYPE(QUZ),
RF_TYPE(JF1), RF_ID(JF1_DIV), BW_NO_LIMIT, CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwl9560_quz_a0_jf_b0_cfg, iwl9462_name, MAC_TYPE(QUZ),
- RF_TYPE(JF1), RF_ID(JF1_DIV), BW_LIMIT(80), CORES(BT), NO_CDB),
+ IWL_DEV_INFO(iwl9560_quz_a0_jf_b0_cfg_80mhz, iwl9462_name, MAC_TYPE(QUZ),
+ RF_TYPE(JF1), RF_ID(JF1_DIV), BW_LIMITED, CORES(BT), NO_CDB),
IWL_DEV_INFO(iwl9560_quz_a0_jf_b0_cfg, iwl9560_160_name, MAC_TYPE(QUZ),
RF_TYPE(JF2), RF_ID(JF), BW_NO_LIMIT, CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwl9560_quz_a0_jf_b0_cfg, iwl9560_name, MAC_TYPE(QUZ),
- RF_TYPE(JF2), RF_ID(JF), BW_LIMIT(80), CORES(BT), NO_CDB),
+ IWL_DEV_INFO(iwl9560_quz_a0_jf_b0_cfg_80mhz, iwl9560_name, MAC_TYPE(QUZ),
+ RF_TYPE(JF2), RF_ID(JF), BW_LIMITED, CORES(BT), NO_CDB),
IWL_DEV_INFO(iwl9560_quz_a0_jf_b0_cfg, iwl9560_killer_1550s_name,
- SUBDEV(0x1551), MAC_TYPE(QUZ), RF_TYPE(JF2), RF_ID(JF),
- BW_NO_LIMIT, CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwl9560_quz_a0_jf_b0_cfg, iwl9560_killer_1550i_name,
- SUBDEV(0x1552), MAC_TYPE(QUZ), RF_TYPE(JF2), RF_ID(JF),
- BW_LIMIT(80), CORES(BT), NO_CDB),
+ SUBDEV(0x1551), MAC_TYPE(QUZ), RF_TYPE(JF2)),
+ IWL_DEV_INFO(iwl9560_quz_a0_jf_b0_cfg_80mhz, iwl9560_killer_1550i_name,
+ SUBDEV(0x1552), MAC_TYPE(QUZ), RF_TYPE(JF2)),
/* Qu with Hr */
/* Qu B step */
IWL_DEV_INFO(iwl_qu_hr1, iwl_ax101_name, MAC_TYPE(QU),
MAC_STEP(B), RF_TYPE(HR1), NO_CDB),
- IWL_DEV_INFO(iwl_qu_hr, iwl_ax203_name, MAC_TYPE(QU), MAC_STEP(B),
- RF_TYPE(HR2), BW_LIMIT(80), NO_CDB),
+ IWL_DEV_INFO(iwl_qu_hr_80mhz, iwl_ax203_name, MAC_TYPE(QU), MAC_STEP(B),
+ RF_TYPE(HR2), BW_LIMITED, NO_CDB),
/* Qu C step */
IWL_DEV_INFO(iwl_qu_hr1, iwl_ax101_name, MAC_TYPE(QU),
MAC_STEP(C), RF_TYPE(HR1), NO_CDB),
- IWL_DEV_INFO(iwl_qu_hr, iwl_ax203_name, MAC_TYPE(QU), MAC_STEP(C),
- RF_TYPE(HR2), BW_LIMIT(80), NO_CDB),
+ IWL_DEV_INFO(iwl_qu_hr_80mhz, iwl_ax203_name, MAC_TYPE(QU), MAC_STEP(C),
+ RF_TYPE(HR2), BW_LIMITED, NO_CDB),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name, MAC_TYPE(QU), MAC_STEP(C),
RF_TYPE(HR2), BW_NO_LIMIT, NO_CDB),
/* QuZ */
IWL_DEV_INFO(iwl_qu_hr1, iwl_ax101_name, MAC_TYPE(QUZ),
RF_TYPE(HR1), NO_CDB),
- IWL_DEV_INFO(iwl_qu_hr, iwl_ax203_name, MAC_TYPE(QUZ),
- MAC_STEP(B), RF_TYPE(HR2), BW_LIMIT(80), NO_CDB),
+ IWL_DEV_INFO(iwl_qu_hr_80mhz, iwl_ax203_name, MAC_TYPE(QUZ),
+ MAC_STEP(B), RF_TYPE(HR2), BW_LIMITED, NO_CDB),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name, MAC_TYPE(QUZ),
MAC_STEP(B), RF_TYPE(HR2), BW_NO_LIMIT, NO_CDB),
NO_CDB),
/* So with Hr */
- IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0, iwl_ax203_name, MAC_TYPE(SO),
- RF_TYPE(HR2), BW_LIMIT(80), NO_CDB),
- IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0, iwl_ax101_name, MAC_TYPE(SO),
- RF_TYPE(HR1), BW_LIMIT(80), NO_CDB),
+ IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0_80mhz, iwl_ax203_name, MAC_TYPE(SO),
+ RF_TYPE(HR2), BW_LIMITED, NO_CDB),
+ IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0_80mhz, iwl_ax101_name, MAC_TYPE(SO),
+ RF_TYPE(HR1), BW_LIMITED, NO_CDB),
IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0, iwl_ax201_name, MAC_TYPE(SO),
RF_TYPE(HR2), BW_NO_LIMIT, NO_CDB),
IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0, iwl_ax201_killer_1650i_name,
MAC_TYPE(SO), RF_TYPE(HR2)),
/* So-F with Hr */
- IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0, iwl_ax203_name, MAC_TYPE(SOF),
- RF_TYPE(HR2), BW_LIMIT(80), NO_CDB),
- IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0, iwl_ax101_name, MAC_TYPE(SOF),
- RF_TYPE(HR1), BW_LIMIT(80), NO_CDB),
+ IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0_80mhz, iwl_ax203_name, MAC_TYPE(SOF),
+ RF_TYPE(HR2), BW_LIMITED, NO_CDB),
+ IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0_80mhz, iwl_ax101_name, MAC_TYPE(SOF),
+ RF_TYPE(HR1), BW_LIMITED, NO_CDB),
IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0, iwl_ax201_name, MAC_TYPE(SOF),
RF_TYPE(HR2), BW_NO_LIMIT, NO_CDB),
/* SoF with JF2 */
IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9560_160_name, MAC_TYPE(SOF),
RF_TYPE(JF2), RF_ID(JF), BW_NO_LIMIT, CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9560_name, MAC_TYPE(SOF),
- RF_TYPE(JF2), RF_ID(JF), BW_LIMIT(80), CORES(BT), NO_CDB),
+ IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0_80mhz, iwl9560_name, MAC_TYPE(SOF),
+ RF_TYPE(JF2), RF_ID(JF), BW_LIMITED, CORES(BT), NO_CDB),
/* SoF with JF */
IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9461_160_name, MAC_TYPE(SOF),
RF_TYPE(JF1), RF_ID(JF1), BW_NO_LIMIT, CORES(BT), NO_CDB),
IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9462_160_name, MAC_TYPE(SOF),
RF_TYPE(JF1), RF_ID(JF1_DIV), BW_NO_LIMIT, CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9461_name, MAC_TYPE(SOF),
- RF_TYPE(JF1), RF_ID(JF1), BW_LIMIT(80), CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9462_name, MAC_TYPE(SOF),
- RF_TYPE(JF1), RF_ID(JF1_DIV), BW_LIMIT(80), CORES(BT), NO_CDB),
+ IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0_80mhz, iwl9461_name, MAC_TYPE(SOF),
+ RF_TYPE(JF1), RF_ID(JF1), BW_LIMITED, CORES(BT), NO_CDB),
+ IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0_80mhz, iwl9462_name, MAC_TYPE(SOF),
+ RF_TYPE(JF1), RF_ID(JF1_DIV), BW_LIMITED, CORES(BT), NO_CDB),
/* So with GF */
IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_name, MAC_TYPE(SO),
/* So with JF2 */
IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9560_160_name, MAC_TYPE(SO),
RF_TYPE(JF2), RF_ID(JF), BW_NO_LIMIT, CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9560_name, MAC_TYPE(SO),
- RF_TYPE(JF2), RF_ID(JF), BW_LIMIT(80), CORES(BT), NO_CDB),
+ IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0_80mhz, iwl9560_name, MAC_TYPE(SO),
+ RF_TYPE(JF2), RF_ID(JF), BW_LIMITED, CORES(BT), NO_CDB),
/* So with JF */
IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9461_160_name, MAC_TYPE(SO),
RF_TYPE(JF1), RF_ID(JF1), BW_NO_LIMIT, CORES(BT), NO_CDB),
IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9462_160_name, MAC_TYPE(SO),
RF_TYPE(JF1), RF_ID(JF1_DIV), BW_NO_LIMIT, CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9461_name, MAC_TYPE(SO),
- RF_TYPE(JF1), RF_ID(JF1), BW_LIMIT(80), CORES(BT), NO_CDB),
- IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9462_name, MAC_TYPE(SO),
- RF_TYPE(JF1), RF_ID(JF1_DIV), BW_LIMIT(80), CORES(BT), NO_CDB),
+ IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0_80mhz, iwl9461_name, MAC_TYPE(SO),
+ RF_TYPE(JF1), RF_ID(JF1), BW_LIMITED, CORES(BT), NO_CDB),
+ IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0_80mhz, iwl9462_name, MAC_TYPE(SO),
+ RF_TYPE(JF1), RF_ID(JF1_DIV), BW_LIMITED, CORES(BT), NO_CDB),
#endif /* CONFIG_IWLMVM */
#if IS_ENABLED(CONFIG_IWLMLD)
/* Ga (Gl) */
IWL_DEV_INFO(iwl_cfg_bz, iwl_gl_name, MAC_TYPE(GL), RF_TYPE(FM),
BW_NO_LIMIT, NO_CDB),
- IWL_DEV_INFO(iwl_cfg_bz, iwl_mtp_name, MAC_TYPE(GL), RF_TYPE(FM),
- BW_LIMIT(160), NO_CDB),
+ IWL_DEV_INFO(iwl_cfg_bz_160mhz, iwl_mtp_name, MAC_TYPE(GL), RF_TYPE(FM),
+ BW_LIMITED, NO_CDB),
/* Sc */
IWL_DEV_INFO(iwl_cfg_sc, iwl_ax211_name, MAC_TYPE(SC), RF_TYPE(GF)),
IWL_DEV_INFO(iwl_cfg_sc, iwl_fm_name, MAC_TYPE(SC), RF_TYPE(FM)),
IWL_DEV_INFO(iwl_cfg_sc, iwl_wh_name, MAC_TYPE(SC), RF_TYPE(WH),
BW_NO_LIMIT),
- IWL_DEV_INFO(iwl_cfg_sc, iwl_sp_name, MAC_TYPE(SC), RF_TYPE(WH),
- BW_LIMIT(160)),
+ IWL_DEV_INFO(iwl_cfg_sc_160mhz, iwl_sp_name, MAC_TYPE(SC), RF_TYPE(WH),
+ BW_LIMITED),
IWL_DEV_INFO(iwl_cfg_sc, iwl_pe_name, MAC_TYPE(SC), RF_TYPE(PE)),
IWL_DEV_INFO(iwl_cfg_sc, iwl_ax211_name, MAC_TYPE(SC2), RF_TYPE(GF)),
IWL_DEV_INFO(iwl_cfg_sc, iwl_fm_name, MAC_TYPE(SC2), RF_TYPE(FM)),
IWL_DEV_INFO(iwl_cfg_sc, iwl_wh_name, MAC_TYPE(SC2), RF_TYPE(WH),
BW_NO_LIMIT),
- IWL_DEV_INFO(iwl_cfg_sc, iwl_sp_name, MAC_TYPE(SC2), RF_TYPE(WH),
- BW_LIMIT(160)),
+ IWL_DEV_INFO(iwl_cfg_sc_160mhz, iwl_sp_name, MAC_TYPE(SC2), RF_TYPE(WH),
+ BW_LIMITED),
IWL_DEV_INFO(iwl_cfg_sc, iwl_pe_name, MAC_TYPE(SC2), RF_TYPE(PE)),
IWL_DEV_INFO(iwl_cfg_sc, iwl_ax211_name, MAC_TYPE(SC2F), RF_TYPE(GF)),
IWL_DEV_INFO(iwl_cfg_sc, iwl_fm_name, MAC_TYPE(SC2F), RF_TYPE(FM)),
IWL_DEV_INFO(iwl_cfg_sc, iwl_wh_name, MAC_TYPE(SC2F), RF_TYPE(WH),
BW_NO_LIMIT),
- IWL_DEV_INFO(iwl_cfg_sc, iwl_sp_name, MAC_TYPE(SC2F), RF_TYPE(WH),
- BW_LIMIT(160)),
+ IWL_DEV_INFO(iwl_cfg_sc_160mhz, iwl_sp_name, MAC_TYPE(SC2F), RF_TYPE(WH),
+ BW_LIMITED),
IWL_DEV_INFO(iwl_cfg_sc, iwl_pe_name, MAC_TYPE(SC2F), RF_TYPE(PE)),
/* Dr */
dev_info->rf_id != rf_id)
continue;
- /*
- * Check that bw_limit have the same "boolean" value since
- * IWL_SUBDEVICE_BW_LIM can only return a boolean value and
- * dev_info->bw_limit encodes a non-boolean value.
- * dev_info->bw_limit == IWL_CFG_BW_NO_LIM must be equal to
- * !bw_limit to have a match.
- */
- if (dev_info->bw_limit != IWL_CFG_BW_ANY &&
- (dev_info->bw_limit == IWL_CFG_BW_NO_LIM) == !!bw_limit)
+ if (dev_info->bw_limit != (u8)IWL_CFG_ANY &&
+ dev_info->bw_limit != bw_limit)
continue;
if (dev_info->cores != (u8)IWL_CFG_ANY &&
if (dev_info) {
iwl_trans->cfg = dev_info->cfg;
iwl_trans->name = dev_info->name;
- iwl_trans->bw_limit = dev_info->bw_limit;
}
#if IS_ENABLED(CONFIG_IWLMVM)