drm/amdkfd: Set SDMA_RLCx_IB_CNTL/SWITCH_INSIDE_IB

When submitting MQD to CP, set SDMA_RLCx_IB_CNTL/SWITCH_INSIDE_IB bit so
it'll allow SDMA preemption if there is a massive command buffer of
long-running SDMA commands.

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
index 80320a6c8854a585f31fb7080ee47460fcbd9256..97933d2a3803233855829d9cbb07c74f7d90e6e0 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
@@ -495,6 +495,10 @@ static void update_mqd_sdma(struct mqd_manager *mm, void *mqd,
        m->sdma_engine_id = q->sdma_engine_id;
        m->sdma_queue_id = q->sdma_queue_id;
        m->sdmax_rlcx_dummy_reg = SDMA_RLC_DUMMY_DEFAULT;
+       /* Allow context switch so we don't cross-process starve with a massive
+        * command buffer of long-running SDMA commands
+        */
+       m->sdmax_rlcx_ib_cntl |= SDMA0_GFX_IB_CNTL__SWITCH_INSIDE_IB_MASK;
 
        q->is_active = QUEUE_IS_ACTIVE(*q);
 }