MIPS: DTS: jz4780: add #clock-cells to rtc_dev
authorH. Nikolaus Schaller <hns@goldelico.com>
Wed, 15 Feb 2023 17:31:56 +0000 (18:31 +0100)
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>
Sun, 19 Feb 2023 08:24:13 +0000 (09:24 +0100)
This makes the driver present the clk32k signal if requested.
It is needed to clock the PMU of the BCM4330 WiFi and Bluetooth
module of the CI20 board.

Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
arch/mips/boot/dts/ingenic/jz4780.dtsi

index c182a656d63bc078a5830c7a8f494b1b0f23d04c..18affff85ce38dae374dadeb9f86b3afcd77df44 100644 (file)
 
                clocks = <&cgu JZ4780_CLK_RTCLK>;
                clock-names = "rtc";
+
+               #clock-cells = <0>;
        };
 
        pinctrl: pin-controller@10010000 {