ARM: dts: qcom: ipq8064: add v2 dtsi variant
authorChristian Marangi <ansuelsmth@gmail.com>
Mon, 18 Jul 2022 16:18:24 +0000 (18:18 +0200)
committerBjorn Andersson <andersson@kernel.org>
Mon, 29 Aug 2022 21:16:18 +0000 (16:16 -0500)
Add ipq8064-v2.0 dtsi variant that differ from original ipq8064 SoC for
some additional pcie, sata and usb configuration values, additional
reserved memory and serial output.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220718161826.4943-1-ansuelsmth@gmail.com
arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi [new file with mode: 0644]
arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi [new file with mode: 0644]

diff --git a/arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi b/arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi
new file mode 100644 (file)
index 0000000..0442580
--- /dev/null
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include "qcom-ipq8064-v2.0.dtsi"
+
+&rpm {
+       smb208_regulators: regulators {
+               compatible = "qcom,rpm-smb208-regulators";
+
+               smb208_s1a: s1a {
+                       regulator-min-microvolt = <1050000>;
+                       regulator-max-microvolt = <1150000>;
+
+                       qcom,switch-mode-frequency = <1200000>;
+               };
+
+               smb208_s1b: s1b {
+                       regulator-min-microvolt = <1050000>;
+                       regulator-max-microvolt = <1150000>;
+
+                       qcom,switch-mode-frequency = <1200000>;
+               };
+
+               smb208_s2a: s2a {
+                       regulator-min-microvolt = < 800000>;
+                       regulator-max-microvolt = <1250000>;
+
+                       qcom,switch-mode-frequency = <1200000>;
+               };
+
+               smb208_s2b: s2b {
+                       regulator-min-microvolt = < 800000>;
+                       regulator-max-microvolt = <1250000>;
+
+                       qcom,switch-mode-frequency = <1200000>;
+               };
+       };
+};
diff --git a/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi b/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
new file mode 100644 (file)
index 0000000..2f117d5
--- /dev/null
@@ -0,0 +1,69 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include "qcom-ipq8064.dtsi"
+
+/ {
+       model = "Qualcomm Technologies, Inc. IPQ8064-v2.0";
+
+       aliases {
+               serial0 = &gsbi4_serial;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               rsvd@41200000 {
+                       reg = <0x41200000 0x300000>;
+                       no-map;
+               };
+       };
+};
+
+&gsbi4 {
+       qcom,mode = <GSBI_PROT_I2C_UART>;
+       status = "okay";
+
+       serial@16340000 {
+               status = "okay";
+       };
+       /*
+        * The i2c device on gsbi4 should not be enabled.
+        * On ipq806x designs gsbi4 i2c is meant for exclusive
+        * RPM usage. Turning this on in kernel manifests as
+        * i2c failure for the RPM.
+        */
+};
+
+&pcie0 {
+       compatible = "qcom,pcie-ipq8064-v2";
+};
+
+&pcie1 {
+       compatible = "qcom,pcie-ipq8064-v2";
+};
+
+&pcie2 {
+       compatible = "qcom,pcie-ipq8064-v2";
+};
+
+&sata {
+       ports-implemented = <0x1>;
+};
+
+&ss_phy_0 {
+       qcom,rx-eq = <2>;
+       qcom,tx-deamp_3_5db = <32>;
+       qcom,mpll = <5>;
+};
+
+&ss_phy_1 {
+       qcom,rx-eq = <2>;
+       qcom,tx-deamp_3_5db = <32>;
+       qcom,mpll = <5>;
+};