ARM: dts: keystone: add interrupt property to PCI controller bindings

Now that Keystone PCIe controller supports error interrupt handling
add interrupt property to PCI controller DT bindings to enable
error interrupt handling.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>

diff --git a/arch/arm/boot/dts/keystone-k2e.dtsi b/arch/arm/boot/dts/keystone-k2e.dtsi
index 5374c9ae4fe6578a8195ea686ae25b22ec8bc165..9a51b8c8858102d89a99b63cd52271fe4eb60a30 100644 (file)
--- a/arch/arm/boot/dts/keystone-k2e.dtsi
+++ b/arch/arm/boot/dts/keystone-k2e.dtsi
@@ -104,6 +104,8 @@
                        num-lanes = <2>;
                        bus-range = <0x00 0xff>;
 
+                       /* error interrupt */
+                       interrupts = <GIC_SPI 385 IRQ_TYPE_EDGE_RISING>;
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 7>;
                        interrupt-map = <0 0 0 1 &pcie_intc1 0>, /* INT A */

diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index f627a1c06648a4ec1c66008a16c66f4f975946da..e23f46d15c806566abc2ec88828bc8d053ffd6e5 100644 (file)
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -302,6 +302,8 @@
                        num-lanes = <2>;
                        bus-range = <0x00 0xff>;
 
+                       /* error interrupt */
+                       interrupts = <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>;
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 7>;
                        interrupt-map = <0 0 0 1 &pcie_intc0 0>, /* INT A */