drm/amdgpu: remove unnecessary conversion to bool

Better clean that up before some automation starts to complain about it

Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
index 82155ac3288a07596fe4b36ae3846704c4c64b7c..12247a32f9ef94a1c3a23e81f16341143314a218 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
@@ -527,7 +527,7 @@ static int acp_set_powergating_state(void *handle,
                                     enum amd_powergating_state state)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-       bool enable = state == AMD_PG_STATE_GATE ? true : false;
+       bool enable = (state == AMD_PG_STATE_GATE);
 
        if (adev->powerplay.pp_funcs &&
                adev->powerplay.pp_funcs->set_powergating_by_smu)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 64b1b2d2d19bba048e645133f67ff80971a8ea2d..990f8e64a4d568f3f5de2f00de3bad8d31f81606 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -985,7 +985,7 @@ static void amdgpu_device_check_vm_size(struct amdgpu_device *adev)
 static void amdgpu_device_check_smu_prv_buffer_size(struct amdgpu_device *adev)
 {
        struct sysinfo si;
-       bool is_os_64 = (sizeof(void *) == 8) ? true : false;
+       bool is_os_64 = (sizeof(void *) == 8);
        uint64_t total_memory;
        uint64_t dram_size_seven_GB = 0x1B8000000;
        uint64_t dram_size_three_GB = 0xB8000000;

diff --git a/drivers/gpu/drm/amd/amdgpu/athub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/athub_v1_0.c
index d9cc746af5e66b4787094c9b2da48f0a4f7ff84e..847ca9b3ce4eabe0786884f84d5ad21c1ce843b0 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/athub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/athub_v1_0.c
@@ -74,9 +74,9 @@ int athub_v1_0_set_clockgating(struct amdgpu_device *adev,
        case CHIP_VEGA20:
        case CHIP_RAVEN:
                athub_update_medium_grain_clock_gating(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                athub_update_medium_grain_light_sleep(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                break;
        default:
                break;

diff --git a/drivers/gpu/drm/amd/amdgpu/athub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/athub_v2_0.c
index ceb9aa4df0e73ba27aa22e61c7116ba832099407..921a69abda55526aab2c40036a9e945547d82f4f 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/athub_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/athub_v2_0.c
@@ -77,9 +77,9 @@ int athub_v2_0_set_clockgating(struct amdgpu_device *adev,
        case CHIP_NAVI14:
        case CHIP_NAVI12:
                athub_v2_0_update_medium_grain_clock_gating(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                athub_v2_0_update_medium_grain_light_sleep(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                break;
        default:
                break;

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 65885ba92a5b6b1f4b93c73873788494460d5847..1785fdad6ecbaa4631468e7202470708465c3d9c 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -4229,7 +4229,7 @@ static int gfx_v10_0_set_powergating_state(void *handle,
                                          enum amd_powergating_state state)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-       bool enable = (state == AMD_PG_STATE_GATE) ? true : false;
+       bool enable = (state == AMD_PG_STATE_GATE);
        switch (adev->asic_type) {
        case CHIP_NAVI10:
        case CHIP_NAVI14:
@@ -4255,7 +4255,7 @@ static int gfx_v10_0_set_clockgating_state(void *handle,
        case CHIP_NAVI14:
        case CHIP_NAVI12:
                gfx_v10_0_update_gfx_clock_gating(adev,
-                                                state == AMD_CG_STATE_GATE ? true : false);
+                                                state == AMD_CG_STATE_GATE);
                break;
        default:
                break;

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index f8b1fd6ae6f4e0f6038d8144d92101b89ca513ef..6558d70fdc582365a2938e9da31e8cd857797ecd 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -4652,7 +4652,7 @@ static int gfx_v9_0_set_powergating_state(void *handle,
                                          enum amd_powergating_state state)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-       bool enable = (state == AMD_PG_STATE_GATE) ? true : false;
+       bool enable = (state == AMD_PG_STATE_GATE);
 
        switch (adev->asic_type) {
        case CHIP_RAVEN:
@@ -4714,7 +4714,7 @@ static int gfx_v9_0_set_clockgating_state(void *handle,
        case CHIP_ARCTURUS:
        case CHIP_RENOIR:
                gfx_v9_0_update_gfx_clock_gating(adev,
-                                                state == AMD_CG_STATE_GATE ? true : false);
+                                                state == AMD_CG_STATE_GATE);
                break;
        default:
                break;

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
index a78292d84854dca5298618ef43a3f246ae1151db..ff2e6e1ccde7ccee5008fe282a4e407a905b4b33 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
@@ -690,7 +690,7 @@ static int jpeg_v2_0_set_clockgating_state(void *handle,
                                          enum amd_clockgating_state state)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-       bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
+       bool enable = (state == AMD_CG_STATE_GATE);
 
        if (enable) {
                if (jpeg_v2_0_is_idle(handle))

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
index 2c58939e6ad03508dddfc75b2e75e63ec0634066..c6d046df4b706951455d2095c46f1eb08361f163 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
@@ -469,7 +469,7 @@ static int jpeg_v2_5_set_clockgating_state(void *handle,
                                          enum amd_clockgating_state state)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-       bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
+       bool enable = (state == AMD_CG_STATE_GATE);
        int i;
 
        for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index adfd8a6171eb83b2951e7eda2074d0b863e1d432..49a3a56ec017d65506a943af107ae1a6f185fc9c 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
@@ -523,9 +523,9 @@ int mmhub_v1_0_set_clockgating(struct amdgpu_device *adev,
        case CHIP_RAVEN:
        case CHIP_RENOIR:
                mmhub_v1_0_update_medium_grain_clock_gating(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                mmhub_v1_0_update_medium_grain_light_sleep(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                break;
        default:
                break;

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
index a7cb185d639a330c79f87ba0fcaae91d2202e0e8..bde1896805219694c1927cbc9a57b39ad9c1fd8d 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
@@ -427,9 +427,9 @@ int mmhub_v2_0_set_clockgating(struct amdgpu_device *adev,
        case CHIP_NAVI14:
        case CHIP_NAVI12:
                mmhub_v2_0_update_medium_grain_clock_gating(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                mmhub_v2_0_update_medium_grain_light_sleep(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                break;
        default:
                break;

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
index a32c9757711f5796422ff272e48a905d73c47d94..a5281df8d84fbd75676420bf6ba16d4ac79af27c 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
@@ -625,9 +625,9 @@ int mmhub_v9_4_set_clockgating(struct amdgpu_device *adev,
        switch (adev->asic_type) {
        case CHIP_ARCTURUS:
                mmhub_v9_4_update_medium_grain_clock_gating(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                mmhub_v9_4_update_medium_grain_light_sleep(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                break;
        default:
                break;

diff --git a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
index f737ce459c288757d850681f8ad6754dc2757abd..cf557a428298ba05f825facabafafb0ad648bf92 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
@@ -426,7 +426,7 @@ static int navi10_ih_set_clockgating_state(void *handle,
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
        navi10_ih_update_clockgating_state(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
        return 0;
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 2e0f8933410e656034dffb96bac8b827d3be21e4..2d1bebdf1603d592b2776cd99fd557305b9d1e75 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -950,13 +950,13 @@ static int nv_common_set_clockgating_state(void *handle,
        case CHIP_NAVI14:
        case CHIP_NAVI12:
                adev->nbio.funcs->update_medium_grain_clock_gating(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                adev->nbio.funcs->update_medium_grain_light_sleep(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                nv_update_hdp_mem_power_gating(adev,
-                                  state == AMD_CG_STATE_GATE ? true : false);
+                                  state == AMD_CG_STATE_GATE);
                nv_update_hdp_clock_gating(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                break;
        default:
                break;

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 27c7001be1eef18ead214325646671949d1c948d..e55884d204bd70529afe7e61bedf36691556eb62 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -2176,9 +2176,9 @@ static int sdma_v4_0_set_clockgating_state(void *handle,
        case CHIP_ARCTURUS:
        case CHIP_RENOIR:
                sdma_v4_0_update_medium_grain_clock_gating(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                sdma_v4_0_update_medium_grain_light_sleep(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                break;
        default:
                break;

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
index 4c6bf1f8a528e6bfe310c74af34aaff82555ede5..67b9830b7c7ebfe3050d8db1cd4458f9f94a0cd5 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
@@ -1525,9 +1525,9 @@ static int sdma_v5_0_set_clockgating_state(void *handle,
        case CHIP_NAVI14:
        case CHIP_NAVI12:
                sdma_v5_0_update_medium_grain_clock_gating(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                sdma_v5_0_update_medium_grain_light_sleep(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                break;
        default:
                break;

diff --git a/drivers/gpu/drm/amd/amdgpu/si_dma.c b/drivers/gpu/drm/amd/amdgpu/si_dma.c
index 9aac9f9c50bb60cbde0a87744a18b3849151d9df..42d5601b6bf35233f7fbea9cad6181da0ce6198f 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/si_dma.c
+++ b/drivers/gpu/drm/amd/amdgpu/si_dma.c
@@ -648,7 +648,7 @@ static int si_dma_set_clockgating_state(void *handle,
        bool enable;
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-       enable = (state == AMD_CG_STATE_GATE) ? true : false;
+       enable = (state == AMD_CG_STATE_GATE);
 
        if (enable && (adev->cg_flags & AMD_CG_SUPPORT_SDMA_MGCG)) {
                for (i = 0; i < adev->sdma.num_instances; i++) {

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 317803f6a561390a75cd5e82b39635e9b0cca4aa..af41ee4c9639e9e5775a0124d9c9c72e1b5ba799 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -1467,38 +1467,38 @@ static int soc15_common_set_clockgating_state(void *handle,
        case CHIP_VEGA12:
        case CHIP_VEGA20:
                adev->nbio.funcs->update_medium_grain_clock_gating(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                adev->nbio.funcs->update_medium_grain_light_sleep(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                soc15_update_hdp_light_sleep(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                soc15_update_drm_clock_gating(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                soc15_update_drm_light_sleep(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                soc15_update_rom_medium_grain_clock_gating(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                adev->df.funcs->update_medium_grain_clock_gating(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                break;
        case CHIP_RAVEN:
        case CHIP_RENOIR:
                adev->nbio.funcs->update_medium_grain_clock_gating(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                adev->nbio.funcs->update_medium_grain_light_sleep(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                soc15_update_hdp_light_sleep(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                soc15_update_drm_clock_gating(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                soc15_update_drm_light_sleep(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                soc15_update_rom_medium_grain_clock_gating(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                break;
        case CHIP_ARCTURUS:
                soc15_update_hdp_light_sleep(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
                break;
        default:
                break;

diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
index 01e62fb8e6e00eb11b74d0c428f6aa3b56ccb119..0fa8aae2d78ebabffd9cdf52b0396dcbb153ae42 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
@@ -763,7 +763,7 @@ static int uvd_v5_0_set_clockgating_state(void *handle,
                                          enum amd_clockgating_state state)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-       bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
+       bool enable = (state == AMD_CG_STATE_GATE);
 
        if (enable) {
                /* wait for STATUS to clear */

diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index 217084d56ab8c86e6b1b16b335bc4faf13258136..e0aadcaf6c8b3cb5629ae5605de26d2fe4a53074 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
@@ -1421,7 +1421,7 @@ static int uvd_v6_0_set_clockgating_state(void *handle,
                                          enum amd_clockgating_state state)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-       bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
+       bool enable = (state == AMD_CG_STATE_GATE);
 
        if (enable) {
                /* wait for STATUS to clear */

diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
index 475ae68f38f5059b8db2cd201f4d120266f19dd9..217db187207c766c08a949d4f006c11d70c4cad6 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
@@ -739,7 +739,7 @@ static int vce_v3_0_set_clockgating_state(void *handle,
                                          enum amd_clockgating_state state)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-       bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
+       bool enable = (state == AMD_CG_STATE_GATE);
        int i;
 
        if (!(adev->cg_flags & AMD_CG_SUPPORT_VCE_MGCG))

diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
index 683701cf72704de702b6d8fcf14be791a0770189..3fd102efb7afe63df7c2ee018ed2c328a856e27e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
@@ -887,7 +887,7 @@ static int vce_v4_0_set_clockgating_state(void *handle,
                                          enum amd_clockgating_state state)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-       bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
+       bool enable = (state == AMD_CG_STATE_GATE);
        int i;
 
        if ((adev->asic_type == CHIP_POLARIS10) ||

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
index e654938f6cca3fb07114acf2cc9349f421254606..1a24fadd30e2da76d1c2a9cd3760f50edfdeb1ef 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
@@ -1346,7 +1346,7 @@ static int vcn_v1_0_set_clockgating_state(void *handle,
                                          enum amd_clockgating_state state)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-       bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
+       bool enable = (state == AMD_CG_STATE_GATE);
 
        if (enable) {
                /* wait for STATUS to clear */

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
index f4db8af6536bf9e9eb45a66789d42686f4944256..b8dc136d2a016dfd7f6ebcce39b1d69d0cf6a787 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
@@ -1213,7 +1213,7 @@ static int vcn_v2_0_set_clockgating_state(void *handle,
                                          enum amd_clockgating_state state)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-       bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
+       bool enable = (state == AMD_CG_STATE_GATE);
 
        if (enable) {
                /* wait for STATUS to clear */

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
index c8b63d57a54130c18f6fe4405a88265b8fcf1cc0..6970d3a1ae6f35c5f73755a081d9f5aad48ca42a 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
@@ -1663,7 +1663,7 @@ static int vcn_v2_5_set_clockgating_state(void *handle,
                                          enum amd_clockgating_state state)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-       bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
+       bool enable = (state == AMD_CG_STATE_GATE);
 
        if (amdgpu_sriov_vf(adev))
                return 0;

diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
index d9e331084ea01454acbc59cbda3e46d61db07423..407c6093c2ec04244823ec78a62060a8e7151f85 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
@@ -717,7 +717,7 @@ static int vega10_ih_set_clockgating_state(void *handle,
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
        vega10_ih_update_clockgating_state(adev,
-                               state == AMD_CG_STATE_GATE ? true : false);
+                               state == AMD_CG_STATE_GATE);
        return 0;
 
 }