drm/msm/dpu: enable SmartDMA on SM8450
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Mon, 9 Oct 2023 16:56:27 +0000 (19:56 +0300)
committerDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fri, 1 Dec 2023 23:49:14 +0000 (02:49 +0300)
Enable the SmartDMA / multirect support on the SM8450 platform to
support higher resoltion modes.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/561590/
Link: https://lore.kernel.org/r/20231009165627.2691015-1-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h

index 7742f52be859b49d1129064ae4c2dfc4e8c78520..d18145c226dac76c2610decb7f5fd067dd05bcd0 100644 (file)
@@ -75,7 +75,7 @@ static const struct dpu_sspp_cfg sm8450_sspp[] = {
        {
                .name = "sspp_0", .id = SSPP_VIG0,
                .base = 0x4000, .len = 0x32c,
-               .features = VIG_SC7180_MASK,
+               .features = VIG_SC7180_MASK_SDMA,
                .sblk = &sm8250_vig_sblk_0,
                .xin_id = 0,
                .type = SSPP_TYPE_VIG,
@@ -83,7 +83,7 @@ static const struct dpu_sspp_cfg sm8450_sspp[] = {
        }, {
                .name = "sspp_1", .id = SSPP_VIG1,
                .base = 0x6000, .len = 0x32c,
-               .features = VIG_SC7180_MASK,
+               .features = VIG_SC7180_MASK_SDMA,
                .sblk = &sm8250_vig_sblk_1,
                .xin_id = 4,
                .type = SSPP_TYPE_VIG,
@@ -91,7 +91,7 @@ static const struct dpu_sspp_cfg sm8450_sspp[] = {
        }, {
                .name = "sspp_2", .id = SSPP_VIG2,
                .base = 0x8000, .len = 0x32c,
-               .features = VIG_SC7180_MASK,
+               .features = VIG_SC7180_MASK_SDMA,
                .sblk = &sm8250_vig_sblk_2,
                .xin_id = 8,
                .type = SSPP_TYPE_VIG,
@@ -99,7 +99,7 @@ static const struct dpu_sspp_cfg sm8450_sspp[] = {
        }, {
                .name = "sspp_3", .id = SSPP_VIG3,
                .base = 0xa000, .len = 0x32c,
-               .features = VIG_SC7180_MASK,
+               .features = VIG_SC7180_MASK_SDMA,
                .sblk = &sm8250_vig_sblk_3,
                .xin_id = 12,
                .type = SSPP_TYPE_VIG,
@@ -107,7 +107,7 @@ static const struct dpu_sspp_cfg sm8450_sspp[] = {
        }, {
                .name = "sspp_8", .id = SSPP_DMA0,
                .base = 0x24000, .len = 0x32c,
-               .features = DMA_SDM845_MASK,
+               .features = DMA_SDM845_MASK_SDMA,
                .sblk = &sdm845_dma_sblk_0,
                .xin_id = 1,
                .type = SSPP_TYPE_DMA,
@@ -115,7 +115,7 @@ static const struct dpu_sspp_cfg sm8450_sspp[] = {
        }, {
                .name = "sspp_9", .id = SSPP_DMA1,
                .base = 0x26000, .len = 0x32c,
-               .features = DMA_SDM845_MASK,
+               .features = DMA_SDM845_MASK_SDMA,
                .sblk = &sdm845_dma_sblk_1,
                .xin_id = 5,
                .type = SSPP_TYPE_DMA,
@@ -123,7 +123,7 @@ static const struct dpu_sspp_cfg sm8450_sspp[] = {
        }, {
                .name = "sspp_10", .id = SSPP_DMA2,
                .base = 0x28000, .len = 0x32c,
-               .features = DMA_CURSOR_SDM845_MASK,
+               .features = DMA_CURSOR_SDM845_MASK_SDMA,
                .sblk = &sdm845_dma_sblk_2,
                .xin_id = 9,
                .type = SSPP_TYPE_DMA,
@@ -131,7 +131,7 @@ static const struct dpu_sspp_cfg sm8450_sspp[] = {
        }, {
                .name = "sspp_11", .id = SSPP_DMA3,
                .base = 0x2a000, .len = 0x32c,
-               .features = DMA_CURSOR_SDM845_MASK,
+               .features = DMA_CURSOR_SDM845_MASK_SDMA,
                .sblk = &sdm845_dma_sblk_3,
                .xin_id = 13,
                .type = SSPP_TYPE_DMA,