arm64: dts: stratix10/agilex: drop useless 'dma-channels/requests' properties
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Sat, 30 Apr 2022 12:18:56 +0000 (14:18 +0200)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Wed, 4 May 2022 08:26:35 +0000 (10:26 +0200)
The pl330 DMA controller provides number of DMA channels and requests
through its registers, so duplicating this information (with a chance of
mistakes) in DTS is pointless.  Additionally the DTS used always wrong
property names which causes DT schema check failures - the bindings
documented 'dma-channels' and 'dma-requests' properties without leading
hash sign.

Reported-by: Rob Herring <robh@kernel.org>
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220430121902.59895-4-krzysztof.kozlowski@linaro.org
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi

index 884bda106399432873621bc2f9acb13058520962..aa2bba75265f19cdff8eccb6638518f1021bfce2 100644 (file)
                                     <0 88 4>,
                                     <0 89 4>;
                        #dma-cells = <1>;
-                       #dma-channels = <8>;
-                       #dma-requests = <32>;
                        clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>;
                        clock-names = "apb_pclk";
                        resets = <&rst DMA_RESET>, <&rst DMA_OCP_RESET>;
index c78371703e764fd85c31ffdfc9136c15075ed913..caccb0334adab73248c5cf9b13c32645970513f2 100644 (file)
                                     <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-cells = <1>;
-                       #dma-channels = <8>;
-                       #dma-requests = <32>;
                        resets = <&rst DMA_RESET>, <&rst DMA_OCP_RESET>;
                        reset-names = "dma", "dma-ocp";
                        clocks = <&clkmgr AGILEX_L4_MAIN_CLK>;