drm/amdgpu: setup the shared and private apertures on gfx9
authorAlex Deucher <alexander.deucher@amd.com>
Fri, 8 Dec 2017 20:09:20 +0000 (15:09 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 15 Dec 2017 22:15:09 +0000 (17:15 -0500)
Same as previous asics.  This was not yet set for gfx9.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

index e9a668bae1947001bd54193e4dc955e388c0be8d..9f7be230734c5a4d99b107dadba77e5530b82598 100644 (file)
@@ -1529,11 +1529,18 @@ static void gfx_v9_0_gpu_init(struct amdgpu_device *adev)
        for (i = 0; i < 16; i++) {
                soc15_grbm_select(adev, 0, 0, 0, i);
                /* CP and shaders */
-               tmp = 0;
-               tmp = REG_SET_FIELD(tmp, SH_MEM_CONFIG, ALIGNMENT_MODE,
-                                   SH_MEM_ALIGNMENT_MODE_UNALIGNED);
-               WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, tmp);
-               WREG32_SOC15(GC, 0, mmSH_MEM_BASES, 0);
+               if (i == 0) {
+                       tmp = REG_SET_FIELD(0, SH_MEM_CONFIG, ALIGNMENT_MODE,
+                                           SH_MEM_ALIGNMENT_MODE_UNALIGNED);
+                       WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, tmp);
+                       WREG32_SOC15(GC, 0, mmSH_MEM_BASES, 0);
+               } else {
+                       tmp = REG_SET_FIELD(0, SH_MEM_CONFIG, ALIGNMENT_MODE,
+                                           SH_MEM_ALIGNMENT_MODE_UNALIGNED);
+                       WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, tmp);
+                       tmp = adev->mc.shared_aperture_start >> 48;
+                       WREG32_SOC15(GC, 0, mmSH_MEM_BASES, tmp);
+               }
        }
        soc15_grbm_select(adev, 0, 0, 0, 0);
 
index 1b5dfccfd5d5a86bdf31fb0fd83d5f10219e465b..5da2272bd3132b5b9989c118b2681f7295b4e048 100644 (file)
@@ -499,6 +499,14 @@ static int gmc_v9_0_early_init(void *handle)
        gmc_v9_0_set_gart_funcs(adev);
        gmc_v9_0_set_irq_funcs(adev);
 
+       adev->mc.shared_aperture_start = 0x2000000000000000ULL;
+       adev->mc.shared_aperture_end =
+               adev->mc.shared_aperture_start + (4ULL << 30) - 1;
+       adev->mc.private_aperture_start =
+               adev->mc.shared_aperture_end + 1;
+       adev->mc.private_aperture_end =
+               adev->mc.private_aperture_start + (4ULL << 30) - 1;
+
        return 0;
 }