drm/amd/pm: expose the firmware_capability from firmware_info table

That will help to determine whether 2ND_USB20_PORT workaround is
needed for Sienna Cichlid.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
index 89be49a43500d2d848ee26e5a1e69b11dc786a2f..4bdbcce7092d17c67523d943a71f2915860e7605 100644 (file)
--- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
@@ -227,6 +227,7 @@ struct smu_bios_boot_up_values
        uint32_t                        content_revision;
        uint32_t                        fclk;
        uint32_t                        lclk;
+       uint32_t                        firmware_caps;
 };
 
 enum smu_table_id

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index f2565eed469ffa453a484ec21a74c3f368e5cdb1..45ecd0386e9fcd98abc097a1f228ab2aa92101f4 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -554,6 +554,7 @@ int smu_v11_0_get_vbios_bootup_values(struct smu_context *smu)
                smu->smu_table.boot_values.vdd_gfx = v_3_1->bootup_vddgfx_mv;
                smu->smu_table.boot_values.cooling_id = v_3_1->coolingsolution_id;
                smu->smu_table.boot_values.pp_table_id = 0;
+               smu->smu_table.boot_values.firmware_caps = v_3_1->firmware_capability;
                break;
        case 3:
        default:
@@ -569,6 +570,7 @@ int smu_v11_0_get_vbios_bootup_values(struct smu_context *smu)
                smu->smu_table.boot_values.vdd_gfx = v_3_3->bootup_vddgfx_mv;
                smu->smu_table.boot_values.cooling_id = v_3_3->coolingsolution_id;
                smu->smu_table.boot_values.pp_table_id = v_3_3->pplib_pptable_id;
+               smu->smu_table.boot_values.firmware_caps = v_3_3->firmware_capability;
        }
 
        smu->smu_table.boot_values.format_revision = header->format_revision;