ARM64: dts: marvell: armada-cp110: Add registers clock for SPI nodes

This extra clock is needed to access the registers of the SPI controller
used on Armada 7K/8K SoCs.

This follows the changes already made in the binding documentation (as
well as in the driver) in:
'commit 92ae112e477ac412decc3fdd5c1eeb6c90c266b4 ("spi: orion: Fix clock
resource by adding an optional bus clock")'.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>

diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
index a8af4136dbe7924e36678640f0d6f2c05267ff1c..0ab921861a2f9b1c669329fb99ae7de55ce18d80 100644 (file)
--- a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
@@ -257,7 +257,9 @@
                        reg = <0x700600 0x50>;
                        #address-cells = <0x1>;
                        #size-cells = <0x0>;
-                       clocks = <&CP110_LABEL(clk) 1 21>;
+                       clock-names = "core", "axi";
+                       clocks = <&CP110_LABEL(clk) 1 21>,
+                                <&CP110_LABEL(clk) 1 17>;
                        status = "disabled";
                };
 
@@ -266,7 +268,9 @@
                        reg = <0x700680 0x50>;
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       clocks = <&CP110_LABEL(clk) 1 21>;
+                       clock-names = "core", "axi";
+                       clocks = <&CP110_LABEL(clk) 1 21>,
+                                <&CP110_LABEL(clk) 1 17>;
                        status = "disabled";
                };