arm64: dts: add clock support for all the cpus
authorSudeep Holla <sudeep.holla@arm.com>
Wed, 3 Jun 2015 13:40:56 +0000 (14:40 +0100)
committerSudeep Holla <sudeep.holla@arm.com>
Fri, 9 Oct 2015 09:23:49 +0000 (10:23 +0100)
This patch adds the CPU clocks so that the CPU DVFS can be enabled.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Jon Medhurst (Tixy) <tixy@linaro.org>
arch/arm64/boot/dts/arm/juno-r1.dts
arch/arm64/boot/dts/arm/juno.dts

index 69130840c6cd146dd88f007701829e2fabd34afb..5eef4aa0c5320e5a3d4f1ae9427f57a0b5881063 100644 (file)
@@ -66,6 +66,7 @@
                        device_type = "cpu";
                        enable-method = "psci";
                        next-level-cache = <&A57_L2>;
+                       clocks = <&scpi_dvfs 0>;
                };
 
                A57_1: cpu@1 {
@@ -74,6 +75,7 @@
                        device_type = "cpu";
                        enable-method = "psci";
                        next-level-cache = <&A57_L2>;
+                       clocks = <&scpi_dvfs 0>;
                };
 
                A53_0: cpu@100 {
@@ -82,6 +84,7 @@
                        device_type = "cpu";
                        enable-method = "psci";
                        next-level-cache = <&A53_L2>;
+                       clocks = <&scpi_dvfs 1>;
                };
 
                A53_1: cpu@101 {
@@ -90,6 +93,7 @@
                        device_type = "cpu";
                        enable-method = "psci";
                        next-level-cache = <&A53_L2>;
+                       clocks = <&scpi_dvfs 1>;
                };
 
                A53_2: cpu@102 {
                        device_type = "cpu";
                        enable-method = "psci";
                        next-level-cache = <&A53_L2>;
+                       clocks = <&scpi_dvfs 1>;
                };
 
                A53_3: cpu@103 {
                        device_type = "cpu";
                        enable-method = "psci";
                        next-level-cache = <&A53_L2>;
+                       clocks = <&scpi_dvfs 1>;
                };
 
                A57_L2: l2-cache0 {
index ce1128a54c8d839147429579d695757645985725..c02f880584e886bb2e67231d17b8c5ac6ccd63ef 100644 (file)
@@ -66,6 +66,7 @@
                        device_type = "cpu";
                        enable-method = "psci";
                        next-level-cache = <&A57_L2>;
+                       clocks = <&scpi_dvfs 0>;
                };
 
                A57_1: cpu@1 {
@@ -74,6 +75,7 @@
                        device_type = "cpu";
                        enable-method = "psci";
                        next-level-cache = <&A57_L2>;
+                       clocks = <&scpi_dvfs 0>;
                };
 
                A53_0: cpu@100 {
@@ -82,6 +84,7 @@
                        device_type = "cpu";
                        enable-method = "psci";
                        next-level-cache = <&A53_L2>;
+                       clocks = <&scpi_dvfs 1>;
                };
 
                A53_1: cpu@101 {
@@ -90,6 +93,7 @@
                        device_type = "cpu";
                        enable-method = "psci";
                        next-level-cache = <&A53_L2>;
+                       clocks = <&scpi_dvfs 1>;
                };
 
                A53_2: cpu@102 {
                        device_type = "cpu";
                        enable-method = "psci";
                        next-level-cache = <&A53_L2>;
+                       clocks = <&scpi_dvfs 1>;
                };
 
                A53_3: cpu@103 {
                        device_type = "cpu";
                        enable-method = "psci";
                        next-level-cache = <&A53_L2>;
+                       clocks = <&scpi_dvfs 1>;
                };
 
                A57_L2: l2-cache0 {