drm/msm/adreno: Add support for SM7150 SoC machine

SM7150 has 5 power levels which correspond to 5 speed-bin values: 0,
128, 146, 167, 172. Speed-bin value is calulated as FMAX/4.8MHz round up
to zero decimal places.

Also a618 on SM7150 uses a615 zapfw. Add a squashed version (.mbn).

Add this as machine = "qcom,sm7150", because speed-bin values are
different from atoll (sc7180/sm7125).

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/578902/
Signed-off-by: Rob Clark <robdclark@chromium.org>

diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
index 2ce7d7b1690dc8f798c659f6d54bf66a66c15d62..b81f90fb425752aef86bbafa895b4fa2a4cfd40a 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/adreno_device.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
@@ -293,6 +293,27 @@ static const struct adreno_info gpulist[] = {
                        { 157, 3 },
                        { 127, 4 },
                ),
+       }, {
+               .machine = "qcom,sm7150",
+               .chip_ids = ADRENO_CHIP_IDS(0x06010800),
+               .family = ADRENO_6XX_GEN1,
+               .fw = {
+                       [ADRENO_FW_SQE] = "a630_sqe.fw",
+                       [ADRENO_FW_GMU] = "a630_gmu.bin",
+               },
+               .gmem = SZ_512K,
+               .inactive_period = DRM_MSM_INACTIVE_PERIOD,
+               .quirks = ADRENO_QUIRK_HAS_CACHED_COHERENT,
+               .init = a6xx_gpu_init,
+               .zapfw = "a615_zap.mbn",
+               .hwcg = a615_hwcg,
+               .speedbins = ADRENO_SPEEDBINS(
+                       { 0,   0 },
+                       { 128, 1 },
+                       { 146, 2 },
+                       { 167, 3 },
+                       { 172, 4 },
+               ),
        }, {
                .chip_ids = ADRENO_CHIP_IDS(0x06010800),
                .family = ADRENO_6XX_GEN1,
@@ -539,6 +560,7 @@ MODULE_FIRMWARE("qcom/a530_zap.b00");
 MODULE_FIRMWARE("qcom/a530_zap.b01");
 MODULE_FIRMWARE("qcom/a530_zap.b02");
 MODULE_FIRMWARE("qcom/a540_gpmu.fw2");
+MODULE_FIRMWARE("qcom/a615_zap.mbn");
 MODULE_FIRMWARE("qcom/a619_gmu.bin");
 MODULE_FIRMWARE("qcom/a630_sqe.fw");
 MODULE_FIRMWARE("qcom/a630_gmu.bin");