NTB: ntb_hw_amd: set peer limit register
authorSanjay R Mehta <sanju.mehta@amd.com>
Fri, 15 Feb 2019 09:21:46 +0000 (09:21 +0000)
committerJon Mason <jdmason@kudzu.us>
Thu, 13 Jun 2019 12:58:08 +0000 (08:58 -0400)
As per amd ntb spec it says that peer limit register
must be programmed

Signed-off-by: Sanjay R Mehta <sanju.mehta@amd.com>
Acked-by: Allen Hubbe <allenbh@gmail.com>
Acked-by: Logan Gunthorpe <logang@deltatee.com>
Acked-by: Serge Semin <fancer.lancer@gmail.com>
Signed-off-by: Jon Mason <jdmason@kudzu.us>
drivers/ntb/hw/amd/ntb_hw_amd.c

index efb214fc545a231514ac1309033beb9579c6014a..cd463e13203520ce4670437e612390ef569a770f 100644 (file)
@@ -160,8 +160,8 @@ static int amd_ntb_mw_set_trans(struct ntb_dev *ntb, int pidx, int idx,
                }
 
                /* set and verify setting the limit */
-               write64(limit, mmio + limit_reg);
-               reg_val = read64(mmio + limit_reg);
+               write64(limit, peer_mmio + limit_reg);
+               reg_val = read64(peer_mmio + limit_reg);
                if (reg_val != limit) {
                        write64(base_addr, mmio + limit_reg);
                        write64(0, peer_mmio + xlat_reg);
@@ -183,8 +183,8 @@ static int amd_ntb_mw_set_trans(struct ntb_dev *ntb, int pidx, int idx,
                }
 
                /* set and verify setting the limit */
-               writel(limit, mmio + limit_reg);
-               reg_val = readl(mmio + limit_reg);
+               writel(limit, peer_mmio + limit_reg);
+               reg_val = readl(peer_mmio + limit_reg);
                if (reg_val != limit) {
                        writel(base_addr, mmio + limit_reg);
                        writel(0, peer_mmio + xlat_reg);