arm64: dts: amlogic: gx: switch to the new PWM controller binding
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Fri, 27 Dec 2024 21:25:12 +0000 (22:25 +0100)
committerNeil Armstrong <neil.armstrong@linaro.org>
Fri, 28 Feb 2025 08:16:50 +0000 (09:16 +0100)
Use the new PWM controller binding which now relies on passing all
clock inputs available on the SoC (instead of passing the "wanted"
clock input for a given board).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20241227212514.1376682-4-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
18 files changed:
arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
arch/arm64/boot/dts/amlogic/meson-gx.dtsi
arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts

index d38c3a224fbed46fed0a96149d540575d4048149..2da49cfbde77c61f6bc818fdbae1d08c898b377c 100644 (file)
 &pwm_AO_ab {
        pinctrl-0 = <&pwm_ao_a_3_pins>;
        pinctrl-names = "default";
-       clocks = <&clkc CLKID_FCLK_DIV4>;
-       clock-names = "clkin0";
        status = "okay";
 };
 
 &pwm_ab {
        pinctrl-0 = <&pwm_b_pins>;
        pinctrl-names = "default";
-       clocks = <&clkc CLKID_FCLK_DIV4>;
-       clock-names = "clkin0";
        status = "okay";
 };
 
 &pwm_ef {
        pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
        pinctrl-names = "default";
-       clocks = <&clkc CLKID_FCLK_DIV4>;
-       clock-names = "clkin0";
        status = "okay";
 };
 
index 45ccddd1aaf0546632c81a52c8917a923beae883..6da1316d97c60c8445477375bddb161fc0c6a7f4 100644 (file)
        status = "okay";
        pinctrl-0 = <&pwm_e_pins>;
        pinctrl-names = "default";
-       clocks = <&clkc CLKID_FCLK_DIV4>;
-       clock-names = "clkin0";
 };
 
 &saradc {
index 2673f0dbafe76456d03617014d61ce0105746376..7d99ca44e660c2763f85fca98c75864b4f8e8969 100644 (file)
                        };
 
                        pwm_ab: pwm@8550 {
-                               compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
+                               compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
                                reg = <0x0 0x08550 0x0 0x10>;
                                #pwm-cells = <3>;
                                status = "disabled";
                        };
 
                        pwm_cd: pwm@8650 {
-                               compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
+                               compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
                                reg = <0x0 0x08650 0x0 0x10>;
                                #pwm-cells = <3>;
                                status = "disabled";
                        };
 
                        pwm_ef: pwm@86c0 {
-                               compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
+                               compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
                                reg = <0x0 0x086c0 0x0 0x10>;
                                #pwm-cells = <3>;
                                status = "disabled";
                        };
 
                        pwm_AO_ab: pwm@550 {
-                               compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
+                               compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
                                reg = <0x0 0x00550 0x0 0x10>;
                                #pwm-cells = <3>;
                                status = "disabled";
index cf2e2ef816807766254086b8b89727d375cb6395..2ecc6ebd5a430f4ecfe1e6b9a96d2ece8e1d86dc 100644 (file)
        status = "okay";
        pinctrl-0 = <&pwm_e_pins>;
        pinctrl-names = "default";
-       clocks = <&clkc CLKID_FCLK_DIV4>;
-       clock-names = "clkin0";
 };
 
 &saradc {
index 7d7dde93fff3f94d85fbc23b9642b53de1db772f..c09da40ff7b00b86c46c3ea48df09c230fd35dc6 100644 (file)
        status = "okay";
        pinctrl-0 = <&pwm_e_pins>;
        pinctrl-names = "default";
-       clocks = <&clkc CLKID_FCLK_DIV4>;
-       clock-names = "clkin0";
 };
 
 /* Wireless SDIO Module */
index 1736bd2e96e214c0535491c87dd28ce6f45f0db5..6f67364fd63f98f6c69b03a083845fc4042969ca 100644 (file)
        status = "okay";
        pinctrl-0 = <&pwm_e_pins>;
        pinctrl-names = "default";
-       clocks = <&clkc CLKID_FCLK_DIV4>;
-       clock-names = "clkin0";
 };
 
 /* Wireless SDIO Module */
index 3807a184810b869abcbc9081453f2f4552f66d75..6ff567225fee449f1c03a6b74be59cf500186222 100644 (file)
        status = "okay";
        pinctrl-0 = <&pwm_e_pins>;
        pinctrl-names = "default";
-       clocks = <&clkc CLKID_FCLK_DIV4>;
-       clock-names = "clkin0";
 };
 
 &saradc {
index deb295227189d29c78e9bb929bbb4a94822c5fc7..bfedfc1472ec51c2351d40925b78d0ad5922e191 100644 (file)
        status = "okay";
        pinctrl-0 = <&pwm_e_pins>;
        pinctrl-names = "default";
-       clocks = <&clkc CLKID_FCLK_DIV4>;
-       clock-names = "clkin0";
 };
 
 &saradc {
index ed00e67e6923a0392acb776e886f848e9522c983..8ebce7114a60b73593abc0a0f5b8ac302106541e 100644 (file)
        };
 };
 
+&pwm_ab {
+       clocks = <&xtal>,
+                <>, /* unknown/untested, the datasheet calls it "vid_pll" */
+                <&clkc CLKID_FCLK_DIV4>,
+                <&clkc CLKID_FCLK_DIV3>;
+};
+
+&pwm_AO_ab {
+       clocks = <&xtal>, <&clkc CLKID_CLK81>;
+};
+
+&pwm_cd {
+       clocks = <&xtal>,
+                <>, /* unknown/untested, the datasheet calls it "vid_pll" */
+                <&clkc CLKID_FCLK_DIV4>,
+                <&clkc CLKID_FCLK_DIV3>;
+};
+
+&pwm_ef {
+       clocks = <&xtal>,
+                <>, /* unknown/untested, the datasheet calls it "vid_pll" */
+                <&clkc CLKID_FCLK_DIV4>,
+                <&clkc CLKID_FCLK_DIV3>;
+};
+
 &pwrc {
        resets = <&reset RESET_VIU>,
                 <&reset RESET_VENC>,
index c5e2306ad7a4b5b4270db9cbebf27a44b89147ad..ca7c4e8e7cac810853e98149ccd9d2815f519ed5 100644 (file)
        status = "okay";
        pinctrl-0 = <&pwm_e_pins>;
        pinctrl-names = "default";
-       clocks = <&clkc CLKID_FCLK_DIV4>;
-       clock-names = "clkin0";
 };
 
 /* This is connected to the Bluetooth module: */
index 2b94b6e5285e29934d6e29d292a3412ffbee1597..4ca90ac947b7b03f77315d8f988a0830e49421c1 100644 (file)
        status = "okay";
        pinctrl-0 = <&pwm_e_pins>;
        pinctrl-names = "default";
-       clocks = <&clkc CLKID_FCLK_DIV4>;
-       clock-names = "clkin0";
 };
 
 &saradc {
index 89fe5110f7a2e7abfdf973bb774d38010f28f091..62a2da766a00fc588514e63977101c86b7537dda 100644 (file)
        status = "okay";
        pinctrl-0 = <&pwm_e_pins>;
        pinctrl-names = "default";
-       clocks = <&clkc CLKID_FCLK_DIV4>;
-       clock-names = "clkin0";
 };
 
 /* SD card */
index a80f0ea2773be600436fb02e8164e2c5f2f040fb..4e89d6f6bb57fefd04317b514c6c26b5f540f96c 100644 (file)
        status = "okay";
        pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
        pinctrl-names = "default";
-       clocks = <&xtal> , <&xtal>;
-       clock-names = "clkin0", "clkin1" ;
 };
 
 &pwm_ef {
index c79f9f2099bf8213102ccb0fb378cbd54dc52101..236cedec9f19d4bb2aacfeef2b591f1063aefc07 100644 (file)
        status = "okay";
        pinctrl-0 = <&pwm_e_pins>;
        pinctrl-names = "default";
-       clocks = <&clkc CLKID_FCLK_DIV4>;
-       clock-names = "clkin0";
 };
 
 /* Wireless SDIO Module */
index b52a830efcce61c4c29163dcc22b250a4b6b93a9..05a0d4de3ad7e91b5ebc4ea60540bb32be93e9ff 100644 (file)
        status = "okay";
        pinctrl-0 = <&pwm_e_pins>;
        pinctrl-names = "default";
-       clocks = <&clkc CLKID_FCLK_DIV4>;
-       clock-names = "clkin0";
 };
 
 &saradc {
index f58d1790de1cb438cb6c4530648b0a5840f76995..2dc2fdaecf9ff5e9c1798f23ad33bc3eef24b6a0 100644 (file)
        };
 };
 
+&pwm_ab {
+       clocks = <&xtal>,
+                <>, /* unknown/untested, the datasheet calls it "vid_pll" */
+                <&clkc CLKID_FCLK_DIV4>,
+                <&clkc CLKID_FCLK_DIV3>;
+};
+
+&pwm_AO_ab {
+       clocks = <&xtal>, <&clkc CLKID_CLK81>;
+};
+
+&pwm_cd {
+       clocks = <&xtal>,
+                <>, /* unknown/untested, the datasheet calls it "vid_pll" */
+                <&clkc CLKID_FCLK_DIV4>,
+                <&clkc CLKID_FCLK_DIV3>;
+};
+
+&pwm_ef {
+       clocks = <&xtal>,
+                <>, /* unknown/untested, the datasheet calls it "vid_pll" */
+                <&clkc CLKID_FCLK_DIV4>,
+                <&clkc CLKID_FCLK_DIV3>;
+};
+
 &pwrc {
        resets = <&reset RESET_VIU>,
                 <&reset RESET_VENC>,
index 96a3dd2d8a99dda08225d60f2919c2f6ffe87856..2a09b3d550e2b635acbd78e36d3a986b40f7578d 100644 (file)
        status = "okay";
        pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
        pinctrl-names = "default";
-       clocks = <&clkc CLKID_FCLK_DIV4>;
-       clock-names = "clkin0";
 };
 
 &pwm_ef {
        status = "okay";
        pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
        pinctrl-names = "default";
-       clocks = <&clkc CLKID_FCLK_DIV4>;
-       clock-names = "clkin0";
 };
 
 &sd_emmc_a {
index 7356d3b628b162129eb123234833ed3143687059..ecaf678b23ddd6f0e1f27532059aa706c29fe046 100644 (file)
        status = "okay";
        pinctrl-0 = <&pwm_e_pins>;
        pinctrl-names = "default";
-       clocks = <&clkc CLKID_FCLK_DIV4>;
-       clock-names = "clkin0";
 };
 
 /* Wireless SDIO Module */