drm/i915/psr: Add proper handling for disabling sel fetch for planes
authorJouni Högander <jouni.hogander@intel.com>
Mon, 20 Nov 2023 08:26:06 +0000 (10:26 +0200)
committerJouni Högander <jouni.hogander@intel.com>
Mon, 27 Nov 2023 05:36:25 +0000 (07:36 +0200)
Currently we are enabling selective fetch for all planes that are visible.
This is suboptimal as we might be fetching for memory for planes that are
not part of selective update.

Fix this by adding proper handling for disabling plane selective fetch:
If plane previously part of selective update is now not part of update:
Add it into updated planes and let the plane configuration to disable
selective fetch for it.

v3: Checkpatch warnings fixed
v2:
  - Add setting sel_fetch_area->y1/y2 to -1
  - Remove setting again local sel_fetch_area variable

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231120082606.3156488-3-jouni.hogander@intel.com
drivers/gpu/drm/i915/display/intel_cursor.c
drivers/gpu/drm/i915/display/intel_psr.c
drivers/gpu/drm/i915/display/skl_universal_plane.c

index c025cafda7d903182397494ae1e5eb5ec06375ee..a515ae2831f800eab6d5094daef3d389ef7d8591 100644 (file)
@@ -485,22 +485,21 @@ static int i9xx_check_cursor(struct intel_crtc_state *crtc_state,
        return 0;
 }
 
-static void i9xx_cursor_update_sel_fetch_arm(struct intel_plane *plane,
-                                            const struct intel_crtc_state *crtc_state,
-                                            const struct intel_plane_state *plane_state)
+static void i9xx_cursor_disable_sel_fetch_arm(struct intel_plane *plane,
+                                             const struct intel_crtc_state *crtc_state)
 {
-       struct drm_i915_private *i915 = to_i915(plane->base.dev);
+       struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
        enum pipe pipe = plane->pipe;
 
        if (!crtc_state->enable_psr2_sel_fetch)
                return;
 
-       intel_de_write_fw(i915, PLANE_SEL_FETCH_CTL(pipe, plane->id),
-                         plane_state->ctl);
+       intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane->id), 0);
 }
 
-static void i9xx_cursor_disable_sel_fetch_arm(struct intel_plane *plane,
-                                             const struct intel_crtc_state *crtc_state)
+static void i9xx_cursor_update_sel_fetch_arm(struct intel_plane *plane,
+                                            const struct intel_crtc_state *crtc_state,
+                                            const struct intel_plane_state *plane_state)
 {
        struct drm_i915_private *i915 = to_i915(plane->base.dev);
        enum pipe pipe = plane->pipe;
@@ -508,7 +507,11 @@ static void i9xx_cursor_disable_sel_fetch_arm(struct intel_plane *plane,
        if (!crtc_state->enable_psr2_sel_fetch)
                return;
 
-       intel_de_write_fw(i915, PLANE_SEL_FETCH_CTL(pipe, plane->id), 0);
+       if (drm_rect_height(&plane_state->psr2_sel_fetch_area) > 0)
+               intel_de_write_fw(i915, PLANE_SEL_FETCH_CTL(pipe, plane->id),
+                                 plane_state->ctl);
+       else
+               i9xx_cursor_disable_sel_fetch_arm(plane, crtc_state);
 }
 
 /* TODO: split into noarm+arm pair */
index e7d65282fb88c77065a27ca2b94a51f63f44d8f3..36e4a1e9b98f88f0c684dd8536769c0c5a91e8a5 100644 (file)
@@ -2176,8 +2176,19 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
                        continue;
 
                inter = pipe_clip;
-               if (!drm_rect_intersect(&inter, &new_plane_state->uapi.dst))
+               sel_fetch_area = &new_plane_state->psr2_sel_fetch_area;
+               if (!drm_rect_intersect(&inter, &new_plane_state->uapi.dst)) {
+                       sel_fetch_area->y1 = -1;
+                       sel_fetch_area->y2 = -1;
+                       /*
+                        * if plane sel fetch was previously enabled ->
+                        * disable it
+                        */
+                       if (drm_rect_height(&old_plane_state->psr2_sel_fetch_area) > 0)
+                               crtc_state->update_planes |= BIT(plane->id);
+
                        continue;
+               }
 
                if (!psr2_sel_fetch_plane_state_supported(new_plane_state)) {
                        full_update = true;
index 0cac8be0c77be1256252faf2beb848b1e245cb15..511dc1544854f42aaa5176afca615b0a61ca4a4b 100644 (file)
@@ -1337,8 +1337,11 @@ static void icl_plane_update_sel_fetch_arm(struct intel_plane *plane,
        if (!crtc_state->enable_psr2_sel_fetch)
                return;
 
-       intel_de_write_fw(i915, PLANE_SEL_FETCH_CTL(pipe, plane->id),
-                         PLANE_SEL_FETCH_CTL_ENABLE);
+       if (drm_rect_height(&plane_state->psr2_sel_fetch_area) > 0)
+               intel_de_write_fw(i915, PLANE_SEL_FETCH_CTL(pipe, plane->id),
+                                 PLANE_SEL_FETCH_CTL_ENABLE);
+       else
+               icl_plane_disable_sel_fetch_arm(plane, crtc_state);
 }
 
 static void