drm/i915/dp: Compute DP tunnel BW during encoder state computation

Compute the BW required through a DP tunnel on links with such tunnels
detected and add the corresponding atomic state during a modeset.

v2:
- Fix error check of intel_dp_tunnel_compute_stream_bw(). (Ville)
- Move intel_dp_tunnel_atomic_cleanup_inherited_state() to this patch.
  (Ville)
- Move intel_dp_tunnel_atomic_clear_stream_bw() to this patch.

Reviewed-by: Uma Shankar <uma.shankar@intel.com> (v1)
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240220211841.448846-16-imre.deak@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c
index 798cb90361a83d1b6b9abe355e46aba3a38523bd..2bb270f82932eba551e66fa2e264c06e9c01808b 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_atomic.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic.c
@@ -352,6 +352,8 @@ void intel_atomic_state_clear(struct drm_atomic_state *s)
        /* state->internal not reset on purpose */
 
        state->dpll_set = state->modeset = false;
+
+       intel_dp_tunnel_atomic_cleanup_inherited_state(state);
 }
 
 struct intel_crtc_state *

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 1fc403661674c06b98b2fce29d38d5018e4f5867..6a2dec97f79b67b47a852edf09c420797e3c605d 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4541,6 +4541,8 @@ intel_crtc_prepare_cleared_state(struct intel_atomic_state *state,
        /* free the old crtc_state->hw members */
        intel_crtc_free_hw_state(crtc_state);
 
+       intel_dp_tunnel_atomic_clear_stream_bw(state, crtc_state);
+
        /* FIXME: before the switch to atomic started, a new pipe_config was
         * kzalloc'd. Code that depends on any field being zero should be
         * fixed, so that the crtc_state can be safely duplicated. For now,

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 32e7fdb2ab938dafda7401274efd1fad979f4aee..3b7adaaa7c960b383a37c577706cf687b984dd30 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2875,6 +2875,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
                        struct drm_connector_state *conn_state)
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+       struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
        struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
        struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
        const struct drm_display_mode *fixed_mode;
@@ -2975,7 +2976,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
        intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
        intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
 
-       return 0;
+       return intel_dp_tunnel_atomic_compute_stream_bw(state, intel_dp, connector,
+                                                       pipe_config);
 }
 
 void intel_dp_set_link_params(struct intel_dp *intel_dp,
@@ -6066,6 +6068,15 @@ static int intel_dp_connector_atomic_check(struct drm_connector *conn,
                        return ret;
        }
 
+       if (!intel_connector_needs_modeset(state, conn))
+               return 0;
+
+       ret = intel_dp_tunnel_atomic_check_state(state,
+                                                intel_dp,
+                                                intel_conn);
+       if (ret)
+               return ret;
+
        /*
         * We don't enable port sync on BDW due to missing w/as and
         * due to not having adjusted the modeset sequence appropriately.
@@ -6073,9 +6084,6 @@ static int intel_dp_connector_atomic_check(struct drm_connector *conn,
        if (DISPLAY_VER(dev_priv) < 9)
                return 0;
 
-       if (!intel_connector_needs_modeset(state, conn))
-               return 0;
-
        if (conn->has_tile) {
                ret = intel_modeset_tile_group(state, conn->tile_group->id);
                if (ret)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 4b6c8ff974297a1746ca8890d202c1cbd691a1e6..db1254b036f188789440fd4ba3963cffdf861057 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -42,6 +42,7 @@
 #include "intel_dp.h"
 #include "intel_dp_hdcp.h"
 #include "intel_dp_mst.h"
+#include "intel_dp_tunnel.h"
 #include "intel_dpio_phy.h"
 #include "intel_hdcp.h"
 #include "intel_hotplug.h"
@@ -523,6 +524,7 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
                                       struct drm_connector_state *conn_state)
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+       struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
        struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
        struct intel_dp *intel_dp = &intel_mst->primary->dp;
        const struct intel_connector *connector =
@@ -619,7 +621,8 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 
        intel_psr_compute_config(intel_dp, pipe_config, conn_state);
 
-       return 0;
+       return intel_dp_tunnel_atomic_compute_stream_bw(state, intel_dp, connector,
+                                                       pipe_config);
 }
 
 /*
@@ -876,6 +879,14 @@ intel_dp_mst_atomic_check(struct drm_connector *connector,
        if (ret)
                return ret;
 
+       if (intel_connector_needs_modeset(state, connector)) {
+               ret = intel_dp_tunnel_atomic_check_state(state,
+                                                        intel_connector->mst_port,
+                                                        intel_connector);
+               if (ret)
+                       return ret;
+       }
+
        return drm_dp_atomic_release_time_slots(&state->base,
                                                &intel_connector->mst_port->mst_mgr,
                                                intel_connector->port);