RDMA/mlx5: Support handling of SW encap ICM area
authorShun Hao <shunh@nvidia.com>
Wed, 6 Dec 2023 14:01:35 +0000 (16:01 +0200)
committerLeon Romanovsky <leon@kernel.org>
Tue, 12 Dec 2023 07:03:57 +0000 (09:03 +0200)
New type for this ICM area, now the user can allocate/deallocate
the new type of SW encap ICM memory, to store the encap header data
which are managed by SW.

Signed-off-by: Shun Hao <shunh@nvidia.com>
Link: https://lore.kernel.org/r/546fe43fc700240709e30acf7713ec6834d652bd.1701871118.git.leon@kernel.org
Signed-off-by: Leon Romanovsky <leon@kernel.org>
drivers/infiniband/hw/mlx5/dm.c
drivers/infiniband/hw/mlx5/mr.c
include/linux/mlx5/driver.h
include/uapi/rdma/mlx5_user_ioctl_verbs.h

index 3669c90b2dadc6ab40a80cc7fb1d0d06369b793c..b4c97fb62abfccbce92a926bf8dd64bbab64c9f1 100644 (file)
@@ -341,6 +341,8 @@ static enum mlx5_sw_icm_type get_icm_type(int uapi_type)
                return MLX5_SW_ICM_TYPE_HEADER_MODIFY;
        case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_PATTERN_SW_ICM:
                return MLX5_SW_ICM_TYPE_HEADER_MODIFY_PATTERN;
+       case MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM:
+               return MLX5_SW_ICM_TYPE_SW_ENCAP;
        case MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM:
        default:
                return MLX5_SW_ICM_TYPE_STEERING;
@@ -364,6 +366,7 @@ static struct ib_dm *handle_alloc_dm_sw_icm(struct ib_ucontext *ctx,
        switch (type) {
        case MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM:
        case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ICM:
+       case MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM:
                if (!(MLX5_CAP_FLOWTABLE_NIC_RX(dev, sw_owner) ||
                      MLX5_CAP_FLOWTABLE_NIC_TX(dev, sw_owner) ||
                      MLX5_CAP_FLOWTABLE_NIC_RX(dev, sw_owner_v2) ||
@@ -438,6 +441,7 @@ struct ib_dm *mlx5_ib_alloc_dm(struct ib_device *ibdev,
        case MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM:
        case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ICM:
        case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_PATTERN_SW_ICM:
+       case MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM:
                return handle_alloc_dm_sw_icm(context, attr, attrs, type);
        default:
                return ERR_PTR(-EOPNOTSUPP);
@@ -491,6 +495,7 @@ static int mlx5_ib_dealloc_dm(struct ib_dm *ibdm,
        case MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM:
        case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ICM:
        case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_PATTERN_SW_ICM:
+       case MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM:
                return mlx5_dm_icm_dealloc(ctx, to_icm(ibdm));
        default:
                return -EOPNOTSUPP;
index 18e459b55746e4e86da57a236973d2751aabc392..a8ee2ca1f4a175ae6c2552e85a5e4639dc975e67 100644 (file)
@@ -1347,6 +1347,7 @@ struct ib_mr *mlx5_ib_reg_dm_mr(struct ib_pd *pd, struct ib_dm *dm,
        case MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM:
        case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ICM:
        case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_PATTERN_SW_ICM:
+       case MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM:
                if (attr->access_flags & ~MLX5_IB_DM_SW_ICM_ALLOWED_ACCESS)
                        return ERR_PTR(-EINVAL);
 
index d2b8d4a74a30867a2275f4051132d0d7a96620c8..96cb8845682d23d4ac89ddc54a9a5fbe069892f1 100644 (file)
@@ -688,6 +688,7 @@ enum mlx5_sw_icm_type {
        MLX5_SW_ICM_TYPE_STEERING,
        MLX5_SW_ICM_TYPE_HEADER_MODIFY,
        MLX5_SW_ICM_TYPE_HEADER_MODIFY_PATTERN,
+       MLX5_SW_ICM_TYPE_SW_ENCAP,
 };
 
 #define MLX5_MAX_RESERVED_GIDS 8
index 7af9e09ea556aaddf18c87d3a3a433db8bbe3672..3189c7f08d1781d181e1c9e99259fe55fb850e16 100644 (file)
@@ -64,6 +64,7 @@ enum mlx5_ib_uapi_dm_type {
        MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM,
        MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ICM,
        MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_PATTERN_SW_ICM,
+       MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM,
 };
 
 enum mlx5_ib_uapi_devx_create_event_channel_flags {