KVM: PPC: Enable prefixed instructions for HV KVM and disable for PR KVM
authorPaul Mackerras <paulus@ozlabs.org>
Wed, 8 Mar 2023 06:36:11 +0000 (17:36 +1100)
committerMichael Ellerman <mpe@ellerman.id.au>
Mon, 3 Apr 2023 05:45:59 +0000 (15:45 +1000)
Now that we can read prefixed instructions from a HV KVM guest and
emulate prefixed load/store instructions to emulated MMIO locations,
we can add HFSCR_PREFIXED into the set of bits that are set in the
HFSCR for a HV KVM guest on POWER10, allowing the guest to use
prefixed instructions.

PR KVM has not yet been extended to handle prefixed instructions in
all situations where we might need to emulate them, so prevent the
guest from enabling prefixed instructions in the FSCR for now.

Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Tested-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Tested-by: Sachin Sant <sachinp@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/ZAgs25dCmLrVkBdU@cleo
arch/powerpc/include/asm/reg.h
arch/powerpc/kvm/book3s_hv.c
arch/powerpc/kvm/book3s_pr.c
arch/powerpc/kvm/book3s_rmhandlers.S

index 1e8b2e04e626a125e48e60d5d4ac4c7758670cdf..7434a3300d8405d75742e81a54af18c81d665c57 100644 (file)
 #define   FSCR_DSCR    __MASK(FSCR_DSCR_LG)
 #define   FSCR_INTR_CAUSE (ASM_CONST(0xFF) << 56)      /* interrupt cause */
 #define SPRN_HFSCR     0xbe    /* HV=1 Facility Status & Control Register */
+#define   HFSCR_PREFIX __MASK(FSCR_PREFIX_LG)
 #define   HFSCR_MSGP   __MASK(FSCR_MSGP_LG)
 #define   HFSCR_TAR    __MASK(FSCR_TAR_LG)
 #define   HFSCR_EBB    __MASK(FSCR_EBB_LG)
index 283b9bcb014c289625b160b812c89d470a8a63e4..c973bf556fb3f67625ab9aadfd8e83a779af4d0a 100644 (file)
@@ -2930,13 +2930,18 @@ static int kvmppc_core_vcpu_create_hv(struct kvm_vcpu *vcpu)
 
        /*
         * Set the default HFSCR for the guest from the host value.
-        * This value is only used on POWER9.
-        * On POWER9, we want to virtualize the doorbell facility, so we
+        * This value is only used on POWER9 and later.
+        * On >= POWER9, we want to virtualize the doorbell facility, so we
         * don't set the HFSCR_MSGP bit, and that causes those instructions
         * to trap and then we emulate them.
         */
        vcpu->arch.hfscr = HFSCR_TAR | HFSCR_EBB | HFSCR_PM | HFSCR_BHRB |
                HFSCR_DSCR | HFSCR_VECVSX | HFSCR_FP;
+
+       /* On POWER10 and later, allow prefixed instructions */
+       if (cpu_has_feature(CPU_FTR_ARCH_31))
+               vcpu->arch.hfscr |= HFSCR_PREFIX;
+
        if (cpu_has_feature(CPU_FTR_HVMODE)) {
                vcpu->arch.hfscr &= mfspr(SPRN_HFSCR);
 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
index 556d90e018b3a217fb0a0d54b8bfdc93673f91c3..da0e888e25211409d6b5e1b2d1789359e9dfee1a 100644 (file)
@@ -1044,6 +1044,8 @@ void kvmppc_set_fscr(struct kvm_vcpu *vcpu, u64 fscr)
 {
        if (fscr & FSCR_SCV)
                fscr &= ~FSCR_SCV; /* SCV must not be enabled */
+       /* Prohibit prefixed instructions for now */
+       fscr &= ~FSCR_PREFIX;
        if ((vcpu->arch.fscr & FSCR_TAR) && !(fscr & FSCR_TAR)) {
                /* TAR got dropped, drop it in shadow too */
                kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
index 03886ca24498380937f7a6563b2dceab118deeb5..0a557ffca9feccdf1fae5db58c04d5d494067f1a 100644 (file)
@@ -123,6 +123,7 @@ INTERRUPT_TRAMPOLINE        BOOK3S_INTERRUPT_ALTIVEC
 kvmppc_handler_skip_ins:
 
        /* Patch the IP to the next instruction */
+       /* Note that prefixed instructions are disabled in PR KVM for now */
        mfsrr0  r12
        addi    r12, r12, 4
        mtsrr0  r12