arm64: insn: Add N immediate encoding

We're missing the a way to generate the encoding of the N immediate,
which is only a single bit used in a number of instruction that take
an immediate.

Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>

diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h
index 4214c38d016bae9f190e1da3734ffbb474b6f714..21fffdd290a3edffb7ff07af4875be391a55b9bc 100644 (file)
--- a/arch/arm64/include/asm/insn.h
+++ b/arch/arm64/include/asm/insn.h
@@ -70,6 +70,7 @@ enum aarch64_insn_imm_type {
        AARCH64_INSN_IMM_6,
        AARCH64_INSN_IMM_S,
        AARCH64_INSN_IMM_R,
+       AARCH64_INSN_IMM_N,
        AARCH64_INSN_IMM_MAX
 };
 

diff --git a/arch/arm64/kernel/insn.c b/arch/arm64/kernel/insn.c
index 2718a77da1653497b25155d23092ca28e63646fb..7e432662d45424e23704cc8ac5397758093cd37a 100644 (file)
--- a/arch/arm64/kernel/insn.c
+++ b/arch/arm64/kernel/insn.c
@@ -343,6 +343,10 @@ static int __kprobes aarch64_get_imm_shift_mask(enum aarch64_insn_imm_type type,
                mask = BIT(6) - 1;
                shift = 16;
                break;
+       case AARCH64_INSN_IMM_N:
+               mask = 1;
+               shift = 22;
+               break;
        default:
                return -EINVAL;
        }