iio: accel: sca3000: Fix alignment for DMA safety

____cacheline_aligned is insufficient guarantee for non-coherent DMA.
Switch to the updated IIO_DMA_MINALIGN definition.

The second alignment marking is left in place to avoid doing more than
the simple fix in this patch.

Fixes: ced5c03d360ae ("staging:iio:accel:sca3000 merge files into one.")
Fixes: 152a6a884ae13 ("staging:iio:accel:sca3000 move to hybrid hard / soft buffer design.")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-8-jic23@kernel.org

diff --git a/drivers/iio/accel/sca3000.c b/drivers/iio/accel/sca3000.c
index 08dedee76e4606e7402c707fc2cacd0a00e0865e..87c54e41f6ccd2f9311653b757b2d794df1dd5d4 100644 (file)
--- a/drivers/iio/accel/sca3000.c
+++ b/drivers/iio/accel/sca3000.c
@@ -167,8 +167,8 @@ struct sca3000_state {
        int                             mo_det_use_count;
        struct mutex                    lock;
        /* Can these share a cacheline ? */
-       u8                              rx[384] ____cacheline_aligned;
-       u8                              tx[6] ____cacheline_aligned;
+       u8                              rx[384] __aligned(IIO_DMA_MINALIGN);
+       u8                              tx[6] __aligned(IIO_DMA_MINALIGN);
 };
 
 /**