irqchip/loongson-pch-msi: Prepare get_pch_msi_handle() for AVECINTC
authorTianyang Zhang <zhangtianyang@loongson.cn>
Fri, 23 Aug 2024 10:43:36 +0000 (18:43 +0800)
committerThomas Gleixner <tglx@linutronix.de>
Fri, 23 Aug 2024 18:40:27 +0000 (20:40 +0200)
On Loongson-3C6000 and higher systems with AVECINTC irqchip, there may
be multiple PCI segments, but only one PCH-MSI irq domain. In this case,
let get_pch_msi_handle() return the first domain handle.

Co-developed-by: Jianmin Lv <lvjianmin@loongson.cn>
Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
Co-developed-by: Liupu Wang <wangliupu@loongson.cn>
Signed-off-by: Liupu Wang <wangliupu@loongson.cn>
Co-developed-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Tianyang Zhang <zhangtianyang@loongson.cn>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/20240823104337.25577-1-zhangtianyang@loongson.cn
drivers/irqchip/irq-loongson-pch-msi.c

index d43731878800c1ab8cc6eda3519e818c7b301702..0dc14550791dbde9247b90c25af072496072a54a 100644 (file)
@@ -255,17 +255,17 @@ IRQCHIP_DECLARE(pch_msi, "loongson,pch-msi-1.0", pch_msi_of_init);
 #ifdef CONFIG_ACPI
 struct fwnode_handle *get_pch_msi_handle(int pci_segment)
 {
-       int i;
+       if (cpu_has_avecint)
+               return pch_msi_handle[0];
 
-       for (i = 0; i < MAX_IO_PICS; i++) {
+       for (int i = 0; i < MAX_IO_PICS; i++) {
                if (msi_group[i].pci_segment == pci_segment)
                        return pch_msi_handle[i];
        }
-       return NULL;
+       return pch_msi_handle[0];
 }
 
-int __init pch_msi_acpi_init(struct irq_domain *parent,
-                                       struct acpi_madt_msi_pic *acpi_pchmsi)
+int __init pch_msi_acpi_init(struct irq_domain *parent, struct acpi_madt_msi_pic *acpi_pchmsi)
 {
        int ret;
        struct fwnode_handle *domain_handle;