ARM: dts: qcom-sdx55: switch USB QMP PHY to new style of bindings
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Thu, 24 Aug 2023 21:19:51 +0000 (00:19 +0300)
committerBjorn Andersson <andersson@kernel.org>
Tue, 14 Nov 2023 17:05:45 +0000 (11:05 -0600)
Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230824211952.1397699-16-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm/boot/dts/qcom/qcom-sdx55.dtsi

index 2aa5089a8513d127e8cc8508549c9f9a1b8aed19..f604a27f50beedcb712fec66cd321e73e9851604 100644 (file)
 
                usb_qmpphy: phy@ff6000 {
                        compatible = "qcom,sdx55-qmp-usb3-uni-phy";
-                       reg = <0x00ff6000 0x1c0>;
-                       status = "disabled";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       ranges;
+                       reg = <0x00ff6000 0x1000>;
 
                        clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
+                                <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
                                 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
-                                <&gcc GCC_USB3_PRIM_CLKREF_CLK>;
-                       clock-names = "aux", "cfg_ahb", "ref";
-
-                       resets = <&gcc GCC_USB3PHY_PHY_BCR>,
-                                <&gcc GCC_USB3_PHY_BCR>;
-                       reset-names = "phy", "common";
-
-                       usb_ssphy: phy@ff6200 {
-                               reg = <0x00ff6200 0x170>,
-                                     <0x00ff6400 0x200>,
-                                     <0x00ff6800 0x800>;
-                               #phy-cells = <0>;
-                               #clock-cells = <0>;
-                               clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
-                               clock-names = "pipe0";
-                               clock-output-names = "usb3_uni_phy_pipe_clk_src";
-                       };
+                                <&gcc GCC_USB3_PHY_PIPE_CLK>;
+                       clock-names = "aux",
+                                     "ref",
+                                     "cfg_ahb",
+                                     "pipe";
+                       clock-output-names = "usb3_uni_phy_pipe_clk_src";
+                       #clock-cells = <0>;
+                       #phy-cells = <0>;
+
+                       resets = <&gcc GCC_USB3_PHY_BCR>,
+                                <&gcc GCC_USB3PHY_PHY_BCR>;
+                       reset-names = "phy",
+                                     "phy_phy";
+
+                       status = "disabled";
                };
 
                mc_virt: interconnect@1100000 {
                                iommus = <&apps_smmu 0x1a0 0x0>;
                                snps,dis_u2_susphy_quirk;
                                snps,dis_enblslpm_quirk;
-                               phys = <&usb_hsphy>, <&usb_ssphy>;
+                               phys = <&usb_hsphy>, <&usb_qmpphy>;
                                phy-names = "usb2-phy", "usb3-phy";
                        };
                };