net: fec: ERR007885 Workaround for conventional TX
authorMattias Barthel <mattias.barthel@atlascopco.com>
Tue, 29 Apr 2025 09:08:26 +0000 (11:08 +0200)
committerJakub Kicinski <kuba@kernel.org>
Thu, 1 May 2025 14:10:00 +0000 (07:10 -0700)
Activate TX hang workaround also in
fec_enet_txq_submit_skb() when TSO is not enabled.

Errata: ERR007885

Symptoms: NETDEV WATCHDOG: eth0 (fec): transmit queue 0 timed out

commit 37d6017b84f7 ("net: fec: Workaround for imx6sx enet tx hang when enable three queues")
There is a TDAR race condition for mutliQ when the software sets TDAR
and the UDMA clears TDAR simultaneously or in a small window (2-4 cycles).
This will cause the udma_tx and udma_tx_arbiter state machines to hang.

So, the Workaround is checking TDAR status four time, if TDAR cleared by
    hardware and then write TDAR, otherwise don't set TDAR.

Fixes: 53bb20d1faba ("net: fec: add variable reg_desc_active to speed things up")
Signed-off-by: Mattias Barthel <mattias.barthel@atlascopco.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/20250429090826.3101258-1-mattiasbarthel@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/freescale/fec_main.c

index a86cfebedaa8b5b4bccb65e50cfeeeb3b8346399..17e9bddb9ddd58f6d49840ed06a5a73c70ee2cc2 100644 (file)
@@ -714,7 +714,12 @@ static int fec_enet_txq_submit_skb(struct fec_enet_priv_tx_q *txq,
        txq->bd.cur = bdp;
 
        /* Trigger transmission start */
-       writel(0, txq->bd.reg_desc_active);
+       if (!(fep->quirks & FEC_QUIRK_ERR007885) ||
+           !readl(txq->bd.reg_desc_active) ||
+           !readl(txq->bd.reg_desc_active) ||
+           !readl(txq->bd.reg_desc_active) ||
+           !readl(txq->bd.reg_desc_active))
+               writel(0, txq->bd.reg_desc_active);
 
        return 0;
 }