drm/amd/display: Add DML2.1 option to disable DRR clamped P-State Strategies
authorDillon Varone <dillon.varone@amd.com>
Thu, 25 Jul 2024 18:18:10 +0000 (14:18 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 6 Aug 2024 15:11:03 +0000 (11:11 -0400)
[WHY & HOW]
When DRR is active with variable refresh rate, add the ability to block DRR
clamped P-State strategies (such as SubVP).

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dc.h
drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c
drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_types.h
drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c

index b6a5ea93fd4502153cd05ce4374273ea4a38ba57..49725f06a2d5ddfc9d71da134f9e3927da488587 100644 (file)
@@ -511,6 +511,7 @@ enum in_game_fams_config {
        INGAME_FAMS_SINGLE_DISP_ENABLE, // enable in-game fams
        INGAME_FAMS_DISABLE, // disable in-game fams
        INGAME_FAMS_MULTI_DISP_ENABLE, //enable in-game fams for multi-display
+       INGAME_FAMS_MULTI_DISP_CLAMPED_ONLY, //enable in-game fams for multi-display only for clamped RR strategies
 };
 
 /**
index 41ecf00ed196593a31dc12e8a07340fed7621e62..d35dd507cb9f8596148e4c4080676eab39cecdac 100644 (file)
@@ -66,7 +66,9 @@ static void dml21_apply_debug_options(const struct dc *in_dc, struct dml2_contex
                        disable_fams2;
        pmo_options->disable_fams2 = disable_fams2;
 
-       pmo_options->disable_drr_var_when_var_active = in_dc->debug.disable_fams_gaming;
+       pmo_options->disable_drr_var_when_var_active = in_dc->debug.disable_fams_gaming == INGAME_FAMS_DISABLE ||
+                       in_dc->debug.disable_fams_gaming == INGAME_FAMS_MULTI_DISP_CLAMPED_ONLY;
+       pmo_options->disable_drr_clamped_when_var_active = in_dc->debug.disable_fams_gaming == INGAME_FAMS_DISABLE;
 }
 
 static void dml21_init(const struct dc *in_dc, struct dml2_context **dml_ctx, const struct dml2_configuration_options *config)
index a824ce56c54e0c33c14714f7c7eb857551df4e78..1c773bbb999294f2578849954066ec86565f49b1 100644 (file)
@@ -74,6 +74,7 @@ struct dml2_pmo_options {
        bool disable_drr_var;
        bool disable_drr_clamped;
        bool disable_drr_var_when_var_active;
+       bool disable_drr_clamped_when_var_active;
        bool disable_fams2;
        bool disable_vactive_det_fill_bw_pad; /* dml2_project_dcn4x_stage2_auto_drr_svp and above only */
        bool disable_dyn_odm;
index 9c6397aafd385bc8ef7a3cbd4a57b3f9a11dfa60..06e786995390d35f74b03bdc6404aa7c3b897984 100644 (file)
@@ -1441,8 +1441,11 @@ static bool stream_matches_drr_policy(struct dml2_pmo_instance *pmo,
                strategy_matches_drr_requirements = false;
        } else if (is_bit_set_in_bitfield(PMO_DRR_CLAMPED_STRATEGY_MASK, stream_pstate_method) &&
                        (pmo->options->disable_drr_clamped ||
-                       !stream_descriptor->timing.drr_config.enabled ||
-                       (!stream_descriptor->timing.drr_config.drr_active_fixed && !stream_descriptor->timing.drr_config.drr_active_variable))) {
+                       (!stream_descriptor->timing.drr_config.enabled ||
+                       (!stream_descriptor->timing.drr_config.drr_active_fixed && !stream_descriptor->timing.drr_config.drr_active_variable)) ||
+                       (pmo->options->disable_drr_clamped_when_var_active &&
+                       stream_descriptor->timing.drr_config.enabled &&
+                       stream_descriptor->timing.drr_config.drr_active_variable))) {
                /* DRR fixed strategies are disallowed due to settings or policy */
                strategy_matches_drr_requirements = false;
        } else if (is_bit_set_in_bitfield(PMO_FW_STRATEGY_MASK, stream_pstate_method) &&