mlxsw: resource: Add resource identifier for port range registers
authorIdo Schimmel <idosch@nvidia.com>
Tue, 11 Jul 2023 16:43:55 +0000 (18:43 +0200)
committerJakub Kicinski <kuba@kernel.org>
Wed, 12 Jul 2023 23:57:18 +0000 (16:57 -0700)
Add a resource identifier for maximum number of layer 4 port range
register so that it could be later used to query the information from
firmware.

Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Reviewed-by: Petr Machata <petrm@nvidia.com>
Signed-off-by: Petr Machata <petrm@nvidia.com>
Link: https://lore.kernel.org/r/59a8fec353d5ad9fbfb7612e4a7ff61eaedad445.1689092769.git.petrm@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/mellanox/mlxsw/resources.h

index 19ae0d1c74a8d7071ae7de84d5adfc410d6c7e81..89dd2777ec4da50f5c5d7e5786a65709d81f32fc 100644 (file)
@@ -39,6 +39,7 @@ enum mlxsw_res_id {
        MLXSW_RES_ID_ACL_FLEX_KEYS,
        MLXSW_RES_ID_ACL_MAX_ACTION_PER_RULE,
        MLXSW_RES_ID_ACL_ACTIONS_PER_SET,
+       MLXSW_RES_ID_ACL_MAX_L4_PORT_RANGE,
        MLXSW_RES_ID_ACL_MAX_ERPT_BANKS,
        MLXSW_RES_ID_ACL_MAX_ERPT_BANK_SIZE,
        MLXSW_RES_ID_ACL_MAX_LARGE_KEY_ID,
@@ -99,6 +100,7 @@ static u16 mlxsw_res_ids[] = {
        [MLXSW_RES_ID_ACL_FLEX_KEYS] = 0x2910,
        [MLXSW_RES_ID_ACL_MAX_ACTION_PER_RULE] = 0x2911,
        [MLXSW_RES_ID_ACL_ACTIONS_PER_SET] = 0x2912,
+       [MLXSW_RES_ID_ACL_MAX_L4_PORT_RANGE] = 0x2920,
        [MLXSW_RES_ID_ACL_MAX_ERPT_BANKS] = 0x2940,
        [MLXSW_RES_ID_ACL_MAX_ERPT_BANK_SIZE] = 0x2941,
        [MLXSW_RES_ID_ACL_MAX_LARGE_KEY_ID] = 0x2942,