drm/amdgpu: Add mqd for userq compute queue

Add mqd for userq compute queue for gfx11/gfx12

Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index 114284e65c7c6b8aab66d977b51cf7607b3c4431..d3b4018580c682071806107ca3ab8da66d2598d9 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -4312,6 +4312,10 @@ static int gfx_v11_0_compute_mqd_init(struct amdgpu_device *adev, void *m,
 
        mqd->cp_hqd_active = prop->hqd_active;
 
+       /* set UQ fenceaddress */
+       mqd->fence_address_lo = lower_32_bits(prop->fence_address);
+       mqd->fence_address_hi = upper_32_bits(prop->fence_address);
+
        return 0;
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
index 1030f2985c7e3599313d1e2d8b213dde7b9d7ea1..0e95c1cfeca639af81942c77b1ab59b4f5a1f878 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
@@ -3215,6 +3215,10 @@ static int gfx_v12_0_compute_mqd_init(struct amdgpu_device *adev, void *m,
 
        mqd->cp_hqd_active = prop->hqd_active;
 
+       /* set UQ fenceaddress */
+       mqd->fence_address_lo = lower_32_bits(prop->fence_address);
+       mqd->fence_address_hi = upper_32_bits(prop->fence_address);
+
        return 0;
 }
 

diff --git a/drivers/gpu/drm/amd/include/v11_structs.h b/drivers/gpu/drm/amd/include/v11_structs.h
index f6d4dab849eb8d26c4031eeed6531ea52bf30943..3728389fc3beebfd29c931385b0f52a374f36bc7 100644 (file)
--- a/drivers/gpu/drm/amd/include/v11_structs.h
+++ b/drivers/gpu/drm/amd/include/v11_structs.h
@@ -1118,8 +1118,8 @@ struct v11_compute_mqd {
        uint32_t reserved_443; // offset: 443  (0x1BB)
        uint32_t reserved_444; // offset: 444  (0x1BC)
        uint32_t reserved_445; // offset: 445  (0x1BD)
-       uint32_t reserved_446; // offset: 446  (0x1BE)
-       uint32_t reserved_447; // offset: 447  (0x1BF)
+       uint32_t fence_address_lo; // offset: 446  (0x1BE)
+       uint32_t fence_address_hi; // offset: 447  (0x1BF)
        uint32_t gws_0_val; // offset: 448  (0x1C0)
        uint32_t gws_1_val; // offset: 449  (0x1C1)
        uint32_t gws_2_val; // offset: 450  (0x1C2)

diff --git a/drivers/gpu/drm/amd/include/v12_structs.h b/drivers/gpu/drm/amd/include/v12_structs.h
index 5787c8a51b7cdc5be9193bea9732e1d847607fe5..03a35f8a65b08b4a3a1526a72ed236202d15cb37 100644 (file)
--- a/drivers/gpu/drm/amd/include/v12_structs.h
+++ b/drivers/gpu/drm/amd/include/v12_structs.h
@@ -1118,8 +1118,8 @@ struct v12_compute_mqd {
     uint32_t reserved_443; // offset: 443  (0x1BB)
     uint32_t reserved_444; // offset: 444  (0x1BC)
     uint32_t reserved_445; // offset: 445  (0x1BD)
-    uint32_t reserved_446; // offset: 446  (0x1BE)
-    uint32_t reserved_447; // offset: 447  (0x1BF)
+    uint32_t fence_address_lo; // offset: 446  (0x1BE)
+    uint32_t fence_address_hi; // offset: 447  (0x1BF)
     uint32_t gws_0_val; // offset: 448  (0x1C0)
     uint32_t gws_1_val; // offset: 449  (0x1C1)
     uint32_t gws_2_val; // offset: 450  (0x1C2)