clk: versaclock7: Convert to use maple tree register cache

The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230929-clk-maple-versaclk-v1-4-24dd5b3d8689@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

diff --git a/drivers/clk/clk-versaclock7.c b/drivers/clk/clk-versaclock7.c
index 9ab35c1af0ff922a653167b9855e91768b323072..f323263e32c3879f8e535a7e3f98f211e75d5c89 100644 (file)
--- a/drivers/clk/clk-versaclock7.c
+++ b/drivers/clk/clk-versaclock7.c
@@ -1275,7 +1275,7 @@ static const struct regmap_config vc7_regmap_config = {
        .ranges = vc7_range_cfg,
        .num_ranges = ARRAY_SIZE(vc7_range_cfg),
        .volatile_reg = vc7_volatile_reg,
-       .cache_type = REGCACHE_RBTREE,
+       .cache_type = REGCACHE_MAPLE,
        .can_multi_write = true,
        .reg_format_endian = REGMAP_ENDIAN_LITTLE,
        .val_format_endian = REGMAP_ENDIAN_LITTLE,