powerpc/pci: Use PCIe IP block revision register instead of compatible
authorRoy Zang <tie-fei.zang@freescale.com>
Mon, 3 Sep 2012 09:22:10 +0000 (17:22 +0800)
committerKumar Gala <galak@kernel.crashing.org>
Wed, 12 Sep 2012 19:57:12 +0000 (14:57 -0500)
Freescale PCIe IP block revision bigger than rev2.2 will also need
redefine the sequence of inbound windows. So change to use IP block
revision instead of compatible for the judgment.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/sysdev/fsl_pci.c

index da7a3d7f54cc8a20f685fc9e6abdde6c3fcc987c..23acaf4692dcff648117631248f1df7fda7e7507 100644 (file)
@@ -143,18 +143,20 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
        pr_debug("PCI memory map start 0x%016llx, size 0x%016llx\n",
                 (u64)rsrc->start, (u64)resource_size(rsrc));
 
-       if (of_device_is_compatible(hose->dn, "fsl,qoriq-pcie-v2.2")) {
-               win_idx = 2;
-               start_idx = 0;
-               end_idx = 3;
-       }
-
        pci = ioremap(rsrc->start, resource_size(rsrc));
        if (!pci) {
            dev_err(hose->parent, "Unable to map ATMU registers\n");
            return;
        }
 
+       if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) {
+               if (in_be32(&pci->block_rev1) >= PCIE_IP_REV_2_2) {
+                       win_idx = 2;
+                       start_idx = 0;
+                       end_idx = 3;
+               }
+       }
+
        /* Disable all windows (except powar0 since it's ignored) */
        for(i = 1; i < 5; i++)
                out_be32(&pci->pow[i].powar, 0);