kbuild: do not add $(srctree) or $(objtree) to header search paths

scripts/Makefile.lib is included not only from scripts/Makefile.build
but also from scripts/Makefile.{vmlinux,modfinal} for building generated
C files.

In scripts/Makefile.{vmlinux,modfinal}, $(obj) and $(src) are empty.

Therefore, the header include paths:

    -I $(srctree)/$(src) -I $(objtree)/$(obj)

... become meaningless code:

    -I $(srctree)/ -I $(objtree)/

Add these paths only when 'obj' and 'src' are defined.

Reported-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/oe-kbuild-all/202404170634.BlqTaYA0-lkp@intel.com/
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Nicolas Schier <n.schier@avm.de>

diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index d1d51e38b55d7ab3e22a4e1630f7cbdaac042d20..e67f066c0cea794b912794b887cf49893d4da158 100644 (file)
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -213,9 +213,9 @@ endif
 # $(objtree)/$(obj) for including generated headers from checkin source files
 ifeq ($(KBUILD_EXTMOD),)
 ifdef building_out_of_srctree
-_c_flags   += -I $(srctree)/$(src) -I $(objtree)/$(obj)
-_a_flags   += -I $(srctree)/$(src) -I $(objtree)/$(obj)
-_cpp_flags += -I $(srctree)/$(src) -I $(objtree)/$(obj)
+_c_flags   += $(addprefix -I $(srctree)/,$(src)) $(addprefix -I $(objtree)/,$(obj))
+_a_flags   += $(addprefix -I $(srctree)/,$(src)) $(addprefix -I $(objtree)/,$(obj))
+_cpp_flags += $(addprefix -I $(srctree)/,$(src)) $(addprefix -I $(objtree)/,$(obj))
 endif
 endif