nvme: move hardware structures out of the uapi version of nvme.h
authorChristoph Hellwig <hch@lst.de>
Fri, 2 Oct 2015 13:25:49 +0000 (15:25 +0200)
committerJens Axboe <axboe@fb.com>
Fri, 9 Oct 2015 16:40:37 +0000 (10:40 -0600)
Currently all NVMe command and completion structures are exposed to userspace
through the uapi version of nvme.h.  They are not an ABI between the kernel
and userspace, and will change in C-incompatible way for future versions of
the spec.  Move them to the kernel version of the file and rename the uapi
header to nvme_ioctl.h so that userspace can easily detect the presence of
the new clean header.  Nvme-cli already carries a local copy of the header,
so it won't be affected by this move.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Keith Busch <keith.busch@intel.com>
Signed-off-by: Jens Axboe <axboe@fb.com>
drivers/block/nvme-core.c
include/linux/nvme.h
include/uapi/linux/nvme.h [deleted file]
include/uapi/linux/nvme_ioctl.h [new file with mode: 0644]

index a20f66a44b96557044ee18d961a07dd0820536b3..a526696d684db841d0ada59eaf6ceede5a9bd4d6 100644 (file)
@@ -42,6 +42,7 @@
 #include <scsi/sg.h>
 #include <asm-generic/io-64-nonatomic-lo-hi.h>
 
+#include <uapi/linux/nvme_ioctl.h>
 #include "nvme.h"
 
 #define NVME_MINORS            (1U << MINORBITS)
index 364cb9adbbbcf0a9d5a33bea44f608b12fcf5c7a..91a805437876065cc1a1bbb78f7a0948698b4d22 100644 (file)
@@ -15,8 +15,6 @@
 #ifndef _LINUX_NVME_H
 #define _LINUX_NVME_H
 
-#include <uapi/linux/nvme.h>
-
 struct nvme_bar {
        __u64                   cap;    /* Controller Capabilities */
        __u32                   vs;     /* Version */
@@ -73,4 +71,528 @@ enum {
        NVME_CSTS_SHST_MASK     = 3 << 2,
 };
 
+struct nvme_id_power_state {
+       __le16                  max_power;      /* centiwatts */
+       __u8                    rsvd2;
+       __u8                    flags;
+       __le32                  entry_lat;      /* microseconds */
+       __le32                  exit_lat;       /* microseconds */
+       __u8                    read_tput;
+       __u8                    read_lat;
+       __u8                    write_tput;
+       __u8                    write_lat;
+       __le16                  idle_power;
+       __u8                    idle_scale;
+       __u8                    rsvd19;
+       __le16                  active_power;
+       __u8                    active_work_scale;
+       __u8                    rsvd23[9];
+};
+
+enum {
+       NVME_PS_FLAGS_MAX_POWER_SCALE   = 1 << 0,
+       NVME_PS_FLAGS_NON_OP_STATE      = 1 << 1,
+};
+
+struct nvme_id_ctrl {
+       __le16                  vid;
+       __le16                  ssvid;
+       char                    sn[20];
+       char                    mn[40];
+       char                    fr[8];
+       __u8                    rab;
+       __u8                    ieee[3];
+       __u8                    mic;
+       __u8                    mdts;
+       __u16                   cntlid;
+       __u32                   ver;
+       __u8                    rsvd84[172];
+       __le16                  oacs;
+       __u8                    acl;
+       __u8                    aerl;
+       __u8                    frmw;
+       __u8                    lpa;
+       __u8                    elpe;
+       __u8                    npss;
+       __u8                    avscc;
+       __u8                    apsta;
+       __le16                  wctemp;
+       __le16                  cctemp;
+       __u8                    rsvd270[242];
+       __u8                    sqes;
+       __u8                    cqes;
+       __u8                    rsvd514[2];
+       __le32                  nn;
+       __le16                  oncs;
+       __le16                  fuses;
+       __u8                    fna;
+       __u8                    vwc;
+       __le16                  awun;
+       __le16                  awupf;
+       __u8                    nvscc;
+       __u8                    rsvd531;
+       __le16                  acwu;
+       __u8                    rsvd534[2];
+       __le32                  sgls;
+       __u8                    rsvd540[1508];
+       struct nvme_id_power_state      psd[32];
+       __u8                    vs[1024];
+};
+
+enum {
+       NVME_CTRL_ONCS_COMPARE                  = 1 << 0,
+       NVME_CTRL_ONCS_WRITE_UNCORRECTABLE      = 1 << 1,
+       NVME_CTRL_ONCS_DSM                      = 1 << 2,
+       NVME_CTRL_VWC_PRESENT                   = 1 << 0,
+};
+
+struct nvme_lbaf {
+       __le16                  ms;
+       __u8                    ds;
+       __u8                    rp;
+};
+
+struct nvme_id_ns {
+       __le64                  nsze;
+       __le64                  ncap;
+       __le64                  nuse;
+       __u8                    nsfeat;
+       __u8                    nlbaf;
+       __u8                    flbas;
+       __u8                    mc;
+       __u8                    dpc;
+       __u8                    dps;
+       __u8                    nmic;
+       __u8                    rescap;
+       __u8                    fpi;
+       __u8                    rsvd33;
+       __le16                  nawun;
+       __le16                  nawupf;
+       __le16                  nacwu;
+       __le16                  nabsn;
+       __le16                  nabo;
+       __le16                  nabspf;
+       __u16                   rsvd46;
+       __le64                  nvmcap[2];
+       __u8                    rsvd64[40];
+       __u8                    nguid[16];
+       __u8                    eui64[8];
+       struct nvme_lbaf        lbaf[16];
+       __u8                    rsvd192[192];
+       __u8                    vs[3712];
+};
+
+enum {
+       NVME_NS_FEAT_THIN       = 1 << 0,
+       NVME_NS_FLBAS_LBA_MASK  = 0xf,
+       NVME_NS_FLBAS_META_EXT  = 0x10,
+       NVME_LBAF_RP_BEST       = 0,
+       NVME_LBAF_RP_BETTER     = 1,
+       NVME_LBAF_RP_GOOD       = 2,
+       NVME_LBAF_RP_DEGRADED   = 3,
+       NVME_NS_DPC_PI_LAST     = 1 << 4,
+       NVME_NS_DPC_PI_FIRST    = 1 << 3,
+       NVME_NS_DPC_PI_TYPE3    = 1 << 2,
+       NVME_NS_DPC_PI_TYPE2    = 1 << 1,
+       NVME_NS_DPC_PI_TYPE1    = 1 << 0,
+       NVME_NS_DPS_PI_FIRST    = 1 << 3,
+       NVME_NS_DPS_PI_MASK     = 0x7,
+       NVME_NS_DPS_PI_TYPE1    = 1,
+       NVME_NS_DPS_PI_TYPE2    = 2,
+       NVME_NS_DPS_PI_TYPE3    = 3,
+};
+
+struct nvme_smart_log {
+       __u8                    critical_warning;
+       __u8                    temperature[2];
+       __u8                    avail_spare;
+       __u8                    spare_thresh;
+       __u8                    percent_used;
+       __u8                    rsvd6[26];
+       __u8                    data_units_read[16];
+       __u8                    data_units_written[16];
+       __u8                    host_reads[16];
+       __u8                    host_writes[16];
+       __u8                    ctrl_busy_time[16];
+       __u8                    power_cycles[16];
+       __u8                    power_on_hours[16];
+       __u8                    unsafe_shutdowns[16];
+       __u8                    media_errors[16];
+       __u8                    num_err_log_entries[16];
+       __le32                  warning_temp_time;
+       __le32                  critical_comp_time;
+       __le16                  temp_sensor[8];
+       __u8                    rsvd216[296];
+};
+
+enum {
+       NVME_SMART_CRIT_SPARE           = 1 << 0,
+       NVME_SMART_CRIT_TEMPERATURE     = 1 << 1,
+       NVME_SMART_CRIT_RELIABILITY     = 1 << 2,
+       NVME_SMART_CRIT_MEDIA           = 1 << 3,
+       NVME_SMART_CRIT_VOLATILE_MEMORY = 1 << 4,
+};
+
+enum {
+       NVME_AER_NOTICE_NS_CHANGED      = 0x0002,
+};
+
+struct nvme_lba_range_type {
+       __u8                    type;
+       __u8                    attributes;
+       __u8                    rsvd2[14];
+       __u64                   slba;
+       __u64                   nlb;
+       __u8                    guid[16];
+       __u8                    rsvd48[16];
+};
+
+enum {
+       NVME_LBART_TYPE_FS      = 0x01,
+       NVME_LBART_TYPE_RAID    = 0x02,
+       NVME_LBART_TYPE_CACHE   = 0x03,
+       NVME_LBART_TYPE_SWAP    = 0x04,
+
+       NVME_LBART_ATTRIB_TEMP  = 1 << 0,
+       NVME_LBART_ATTRIB_HIDE  = 1 << 1,
+};
+
+struct nvme_reservation_status {
+       __le32  gen;
+       __u8    rtype;
+       __u8    regctl[2];
+       __u8    resv5[2];
+       __u8    ptpls;
+       __u8    resv10[13];
+       struct {
+               __le16  cntlid;
+               __u8    rcsts;
+               __u8    resv3[5];
+               __le64  hostid;
+               __le64  rkey;
+       } regctl_ds[];
+};
+
+/* I/O commands */
+
+enum nvme_opcode {
+       nvme_cmd_flush          = 0x00,
+       nvme_cmd_write          = 0x01,
+       nvme_cmd_read           = 0x02,
+       nvme_cmd_write_uncor    = 0x04,
+       nvme_cmd_compare        = 0x05,
+       nvme_cmd_write_zeroes   = 0x08,
+       nvme_cmd_dsm            = 0x09,
+       nvme_cmd_resv_register  = 0x0d,
+       nvme_cmd_resv_report    = 0x0e,
+       nvme_cmd_resv_acquire   = 0x11,
+       nvme_cmd_resv_release   = 0x15,
+};
+
+struct nvme_common_command {
+       __u8                    opcode;
+       __u8                    flags;
+       __u16                   command_id;
+       __le32                  nsid;
+       __le32                  cdw2[2];
+       __le64                  metadata;
+       __le64                  prp1;
+       __le64                  prp2;
+       __le32                  cdw10[6];
+};
+
+struct nvme_rw_command {
+       __u8                    opcode;
+       __u8                    flags;
+       __u16                   command_id;
+       __le32                  nsid;
+       __u64                   rsvd2;
+       __le64                  metadata;
+       __le64                  prp1;
+       __le64                  prp2;
+       __le64                  slba;
+       __le16                  length;
+       __le16                  control;
+       __le32                  dsmgmt;
+       __le32                  reftag;
+       __le16                  apptag;
+       __le16                  appmask;
+};
+
+enum {
+       NVME_RW_LR                      = 1 << 15,
+       NVME_RW_FUA                     = 1 << 14,
+       NVME_RW_DSM_FREQ_UNSPEC         = 0,
+       NVME_RW_DSM_FREQ_TYPICAL        = 1,
+       NVME_RW_DSM_FREQ_RARE           = 2,
+       NVME_RW_DSM_FREQ_READS          = 3,
+       NVME_RW_DSM_FREQ_WRITES         = 4,
+       NVME_RW_DSM_FREQ_RW             = 5,
+       NVME_RW_DSM_FREQ_ONCE           = 6,
+       NVME_RW_DSM_FREQ_PREFETCH       = 7,
+       NVME_RW_DSM_FREQ_TEMP           = 8,
+       NVME_RW_DSM_LATENCY_NONE        = 0 << 4,
+       NVME_RW_DSM_LATENCY_IDLE        = 1 << 4,
+       NVME_RW_DSM_LATENCY_NORM        = 2 << 4,
+       NVME_RW_DSM_LATENCY_LOW         = 3 << 4,
+       NVME_RW_DSM_SEQ_REQ             = 1 << 6,
+       NVME_RW_DSM_COMPRESSED          = 1 << 7,
+       NVME_RW_PRINFO_PRCHK_REF        = 1 << 10,
+       NVME_RW_PRINFO_PRCHK_APP        = 1 << 11,
+       NVME_RW_PRINFO_PRCHK_GUARD      = 1 << 12,
+       NVME_RW_PRINFO_PRACT            = 1 << 13,
+};
+
+struct nvme_dsm_cmd {
+       __u8                    opcode;
+       __u8                    flags;
+       __u16                   command_id;
+       __le32                  nsid;
+       __u64                   rsvd2[2];
+       __le64                  prp1;
+       __le64                  prp2;
+       __le32                  nr;
+       __le32                  attributes;
+       __u32                   rsvd12[4];
+};
+
+enum {
+       NVME_DSMGMT_IDR         = 1 << 0,
+       NVME_DSMGMT_IDW         = 1 << 1,
+       NVME_DSMGMT_AD          = 1 << 2,
+};
+
+struct nvme_dsm_range {
+       __le32                  cattr;
+       __le32                  nlb;
+       __le64                  slba;
+};
+
+/* Admin commands */
+
+enum nvme_admin_opcode {
+       nvme_admin_delete_sq            = 0x00,
+       nvme_admin_create_sq            = 0x01,
+       nvme_admin_get_log_page         = 0x02,
+       nvme_admin_delete_cq            = 0x04,
+       nvme_admin_create_cq            = 0x05,
+       nvme_admin_identify             = 0x06,
+       nvme_admin_abort_cmd            = 0x08,
+       nvme_admin_set_features         = 0x09,
+       nvme_admin_get_features         = 0x0a,
+       nvme_admin_async_event          = 0x0c,
+       nvme_admin_activate_fw          = 0x10,
+       nvme_admin_download_fw          = 0x11,
+       nvme_admin_format_nvm           = 0x80,
+       nvme_admin_security_send        = 0x81,
+       nvme_admin_security_recv        = 0x82,
+};
+
+enum {
+       NVME_QUEUE_PHYS_CONTIG  = (1 << 0),
+       NVME_CQ_IRQ_ENABLED     = (1 << 1),
+       NVME_SQ_PRIO_URGENT     = (0 << 1),
+       NVME_SQ_PRIO_HIGH       = (1 << 1),
+       NVME_SQ_PRIO_MEDIUM     = (2 << 1),
+       NVME_SQ_PRIO_LOW        = (3 << 1),
+       NVME_FEAT_ARBITRATION   = 0x01,
+       NVME_FEAT_POWER_MGMT    = 0x02,
+       NVME_FEAT_LBA_RANGE     = 0x03,
+       NVME_FEAT_TEMP_THRESH   = 0x04,
+       NVME_FEAT_ERR_RECOVERY  = 0x05,
+       NVME_FEAT_VOLATILE_WC   = 0x06,
+       NVME_FEAT_NUM_QUEUES    = 0x07,
+       NVME_FEAT_IRQ_COALESCE  = 0x08,
+       NVME_FEAT_IRQ_CONFIG    = 0x09,
+       NVME_FEAT_WRITE_ATOMIC  = 0x0a,
+       NVME_FEAT_ASYNC_EVENT   = 0x0b,
+       NVME_FEAT_AUTO_PST      = 0x0c,
+       NVME_FEAT_SW_PROGRESS   = 0x80,
+       NVME_FEAT_HOST_ID       = 0x81,
+       NVME_FEAT_RESV_MASK     = 0x82,
+       NVME_FEAT_RESV_PERSIST  = 0x83,
+       NVME_LOG_ERROR          = 0x01,
+       NVME_LOG_SMART          = 0x02,
+       NVME_LOG_FW_SLOT        = 0x03,
+       NVME_LOG_RESERVATION    = 0x80,
+       NVME_FWACT_REPL         = (0 << 3),
+       NVME_FWACT_REPL_ACTV    = (1 << 3),
+       NVME_FWACT_ACTV         = (2 << 3),
+};
+
+struct nvme_identify {
+       __u8                    opcode;
+       __u8                    flags;
+       __u16                   command_id;
+       __le32                  nsid;
+       __u64                   rsvd2[2];
+       __le64                  prp1;
+       __le64                  prp2;
+       __le32                  cns;
+       __u32                   rsvd11[5];
+};
+
+struct nvme_features {
+       __u8                    opcode;
+       __u8                    flags;
+       __u16                   command_id;
+       __le32                  nsid;
+       __u64                   rsvd2[2];
+       __le64                  prp1;
+       __le64                  prp2;
+       __le32                  fid;
+       __le32                  dword11;
+       __u32                   rsvd12[4];
+};
+
+struct nvme_create_cq {
+       __u8                    opcode;
+       __u8                    flags;
+       __u16                   command_id;
+       __u32                   rsvd1[5];
+       __le64                  prp1;
+       __u64                   rsvd8;
+       __le16                  cqid;
+       __le16                  qsize;
+       __le16                  cq_flags;
+       __le16                  irq_vector;
+       __u32                   rsvd12[4];
+};
+
+struct nvme_create_sq {
+       __u8                    opcode;
+       __u8                    flags;
+       __u16                   command_id;
+       __u32                   rsvd1[5];
+       __le64                  prp1;
+       __u64                   rsvd8;
+       __le16                  sqid;
+       __le16                  qsize;
+       __le16                  sq_flags;
+       __le16                  cqid;
+       __u32                   rsvd12[4];
+};
+
+struct nvme_delete_queue {
+       __u8                    opcode;
+       __u8                    flags;
+       __u16                   command_id;
+       __u32                   rsvd1[9];
+       __le16                  qid;
+       __u16                   rsvd10;
+       __u32                   rsvd11[5];
+};
+
+struct nvme_abort_cmd {
+       __u8                    opcode;
+       __u8                    flags;
+       __u16                   command_id;
+       __u32                   rsvd1[9];
+       __le16                  sqid;
+       __u16                   cid;
+       __u32                   rsvd11[5];
+};
+
+struct nvme_download_firmware {
+       __u8                    opcode;
+       __u8                    flags;
+       __u16                   command_id;
+       __u32                   rsvd1[5];
+       __le64                  prp1;
+       __le64                  prp2;
+       __le32                  numd;
+       __le32                  offset;
+       __u32                   rsvd12[4];
+};
+
+struct nvme_format_cmd {
+       __u8                    opcode;
+       __u8                    flags;
+       __u16                   command_id;
+       __le32                  nsid;
+       __u64                   rsvd2[4];
+       __le32                  cdw10;
+       __u32                   rsvd11[5];
+};
+
+struct nvme_command {
+       union {
+               struct nvme_common_command common;
+               struct nvme_rw_command rw;
+               struct nvme_identify identify;
+               struct nvme_features features;
+               struct nvme_create_cq create_cq;
+               struct nvme_create_sq create_sq;
+               struct nvme_delete_queue delete_queue;
+               struct nvme_download_firmware dlfw;
+               struct nvme_format_cmd format;
+               struct nvme_dsm_cmd dsm;
+               struct nvme_abort_cmd abort;
+       };
+};
+
+enum {
+       NVME_SC_SUCCESS                 = 0x0,
+       NVME_SC_INVALID_OPCODE          = 0x1,
+       NVME_SC_INVALID_FIELD           = 0x2,
+       NVME_SC_CMDID_CONFLICT          = 0x3,
+       NVME_SC_DATA_XFER_ERROR         = 0x4,
+       NVME_SC_POWER_LOSS              = 0x5,
+       NVME_SC_INTERNAL                = 0x6,
+       NVME_SC_ABORT_REQ               = 0x7,
+       NVME_SC_ABORT_QUEUE             = 0x8,
+       NVME_SC_FUSED_FAIL              = 0x9,
+       NVME_SC_FUSED_MISSING           = 0xa,
+       NVME_SC_INVALID_NS              = 0xb,
+       NVME_SC_CMD_SEQ_ERROR           = 0xc,
+       NVME_SC_SGL_INVALID_LAST        = 0xd,
+       NVME_SC_SGL_INVALID_COUNT       = 0xe,
+       NVME_SC_SGL_INVALID_DATA        = 0xf,
+       NVME_SC_SGL_INVALID_METADATA    = 0x10,
+       NVME_SC_SGL_INVALID_TYPE        = 0x11,
+       NVME_SC_LBA_RANGE               = 0x80,
+       NVME_SC_CAP_EXCEEDED            = 0x81,
+       NVME_SC_NS_NOT_READY            = 0x82,
+       NVME_SC_RESERVATION_CONFLICT    = 0x83,
+       NVME_SC_CQ_INVALID              = 0x100,
+       NVME_SC_QID_INVALID             = 0x101,
+       NVME_SC_QUEUE_SIZE              = 0x102,
+       NVME_SC_ABORT_LIMIT             = 0x103,
+       NVME_SC_ABORT_MISSING           = 0x104,
+       NVME_SC_ASYNC_LIMIT             = 0x105,
+       NVME_SC_FIRMWARE_SLOT           = 0x106,
+       NVME_SC_FIRMWARE_IMAGE          = 0x107,
+       NVME_SC_INVALID_VECTOR          = 0x108,
+       NVME_SC_INVALID_LOG_PAGE        = 0x109,
+       NVME_SC_INVALID_FORMAT          = 0x10a,
+       NVME_SC_FIRMWARE_NEEDS_RESET    = 0x10b,
+       NVME_SC_INVALID_QUEUE           = 0x10c,
+       NVME_SC_FEATURE_NOT_SAVEABLE    = 0x10d,
+       NVME_SC_FEATURE_NOT_CHANGEABLE  = 0x10e,
+       NVME_SC_FEATURE_NOT_PER_NS      = 0x10f,
+       NVME_SC_FW_NEEDS_RESET_SUBSYS   = 0x110,
+       NVME_SC_BAD_ATTRIBUTES          = 0x180,
+       NVME_SC_INVALID_PI              = 0x181,
+       NVME_SC_READ_ONLY               = 0x182,
+       NVME_SC_WRITE_FAULT             = 0x280,
+       NVME_SC_READ_ERROR              = 0x281,
+       NVME_SC_GUARD_CHECK             = 0x282,
+       NVME_SC_APPTAG_CHECK            = 0x283,
+       NVME_SC_REFTAG_CHECK            = 0x284,
+       NVME_SC_COMPARE_FAILED          = 0x285,
+       NVME_SC_ACCESS_DENIED           = 0x286,
+       NVME_SC_DNR                     = 0x4000,
+};
+
+struct nvme_completion {
+       __le32  result;         /* Used by admin commands to return data */
+       __u32   rsvd;
+       __le16  sq_head;        /* how much of this queue may be reclaimed */
+       __le16  sq_id;          /* submission queue that generated this entry */
+       __u16   command_id;     /* of the command which completed */
+       __le16  status;         /* did the command fail, and if so, why? */
+};
+
+#define NVME_VS(major, minor) (((major) << 16) | ((minor) << 8))
+
 #endif /* _LINUX_NVME_H */
diff --git a/include/uapi/linux/nvme.h b/include/uapi/linux/nvme.h
deleted file mode 100644 (file)
index 8864194..0000000
+++ /dev/null
@@ -1,589 +0,0 @@
-/*
- * Definitions for the NVM Express interface
- * Copyright (c) 2011-2014, Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- */
-
-#ifndef _UAPI_LINUX_NVME_H
-#define _UAPI_LINUX_NVME_H
-
-#include <linux/types.h>
-
-struct nvme_id_power_state {
-       __le16                  max_power;      /* centiwatts */
-       __u8                    rsvd2;
-       __u8                    flags;
-       __le32                  entry_lat;      /* microseconds */
-       __le32                  exit_lat;       /* microseconds */
-       __u8                    read_tput;
-       __u8                    read_lat;
-       __u8                    write_tput;
-       __u8                    write_lat;
-       __le16                  idle_power;
-       __u8                    idle_scale;
-       __u8                    rsvd19;
-       __le16                  active_power;
-       __u8                    active_work_scale;
-       __u8                    rsvd23[9];
-};
-
-enum {
-       NVME_PS_FLAGS_MAX_POWER_SCALE   = 1 << 0,
-       NVME_PS_FLAGS_NON_OP_STATE      = 1 << 1,
-};
-
-struct nvme_id_ctrl {
-       __le16                  vid;
-       __le16                  ssvid;
-       char                    sn[20];
-       char                    mn[40];
-       char                    fr[8];
-       __u8                    rab;
-       __u8                    ieee[3];
-       __u8                    mic;
-       __u8                    mdts;
-       __u16                   cntlid;
-       __u32                   ver;
-       __u8                    rsvd84[172];
-       __le16                  oacs;
-       __u8                    acl;
-       __u8                    aerl;
-       __u8                    frmw;
-       __u8                    lpa;
-       __u8                    elpe;
-       __u8                    npss;
-       __u8                    avscc;
-       __u8                    apsta;
-       __le16                  wctemp;
-       __le16                  cctemp;
-       __u8                    rsvd270[242];
-       __u8                    sqes;
-       __u8                    cqes;
-       __u8                    rsvd514[2];
-       __le32                  nn;
-       __le16                  oncs;
-       __le16                  fuses;
-       __u8                    fna;
-       __u8                    vwc;
-       __le16                  awun;
-       __le16                  awupf;
-       __u8                    nvscc;
-       __u8                    rsvd531;
-       __le16                  acwu;
-       __u8                    rsvd534[2];
-       __le32                  sgls;
-       __u8                    rsvd540[1508];
-       struct nvme_id_power_state      psd[32];
-       __u8                    vs[1024];
-};
-
-enum {
-       NVME_CTRL_ONCS_COMPARE                  = 1 << 0,
-       NVME_CTRL_ONCS_WRITE_UNCORRECTABLE      = 1 << 1,
-       NVME_CTRL_ONCS_DSM                      = 1 << 2,
-       NVME_CTRL_VWC_PRESENT                   = 1 << 0,
-};
-
-struct nvme_lbaf {
-       __le16                  ms;
-       __u8                    ds;
-       __u8                    rp;
-};
-
-struct nvme_id_ns {
-       __le64                  nsze;
-       __le64                  ncap;
-       __le64                  nuse;
-       __u8                    nsfeat;
-       __u8                    nlbaf;
-       __u8                    flbas;
-       __u8                    mc;
-       __u8                    dpc;
-       __u8                    dps;
-       __u8                    nmic;
-       __u8                    rescap;
-       __u8                    fpi;
-       __u8                    rsvd33;
-       __le16                  nawun;
-       __le16                  nawupf;
-       __le16                  nacwu;
-       __le16                  nabsn;
-       __le16                  nabo;
-       __le16                  nabspf;
-       __u16                   rsvd46;
-       __le64                  nvmcap[2];
-       __u8                    rsvd64[40];
-       __u8                    nguid[16];
-       __u8                    eui64[8];
-       struct nvme_lbaf        lbaf[16];
-       __u8                    rsvd192[192];
-       __u8                    vs[3712];
-};
-
-enum {
-       NVME_NS_FEAT_THIN       = 1 << 0,
-       NVME_NS_FLBAS_LBA_MASK  = 0xf,
-       NVME_NS_FLBAS_META_EXT  = 0x10,
-       NVME_LBAF_RP_BEST       = 0,
-       NVME_LBAF_RP_BETTER     = 1,
-       NVME_LBAF_RP_GOOD       = 2,
-       NVME_LBAF_RP_DEGRADED   = 3,
-       NVME_NS_DPC_PI_LAST     = 1 << 4,
-       NVME_NS_DPC_PI_FIRST    = 1 << 3,
-       NVME_NS_DPC_PI_TYPE3    = 1 << 2,
-       NVME_NS_DPC_PI_TYPE2    = 1 << 1,
-       NVME_NS_DPC_PI_TYPE1    = 1 << 0,
-       NVME_NS_DPS_PI_FIRST    = 1 << 3,
-       NVME_NS_DPS_PI_MASK     = 0x7,
-       NVME_NS_DPS_PI_TYPE1    = 1,
-       NVME_NS_DPS_PI_TYPE2    = 2,
-       NVME_NS_DPS_PI_TYPE3    = 3,
-};
-
-struct nvme_smart_log {
-       __u8                    critical_warning;
-       __u8                    temperature[2];
-       __u8                    avail_spare;
-       __u8                    spare_thresh;
-       __u8                    percent_used;
-       __u8                    rsvd6[26];
-       __u8                    data_units_read[16];
-       __u8                    data_units_written[16];
-       __u8                    host_reads[16];
-       __u8                    host_writes[16];
-       __u8                    ctrl_busy_time[16];
-       __u8                    power_cycles[16];
-       __u8                    power_on_hours[16];
-       __u8                    unsafe_shutdowns[16];
-       __u8                    media_errors[16];
-       __u8                    num_err_log_entries[16];
-       __le32                  warning_temp_time;
-       __le32                  critical_comp_time;
-       __le16                  temp_sensor[8];
-       __u8                    rsvd216[296];
-};
-
-enum {
-       NVME_SMART_CRIT_SPARE           = 1 << 0,
-       NVME_SMART_CRIT_TEMPERATURE     = 1 << 1,
-       NVME_SMART_CRIT_RELIABILITY     = 1 << 2,
-       NVME_SMART_CRIT_MEDIA           = 1 << 3,
-       NVME_SMART_CRIT_VOLATILE_MEMORY = 1 << 4,
-};
-
-enum {
-       NVME_AER_NOTICE_NS_CHANGED      = 0x0002,
-};
-
-struct nvme_lba_range_type {
-       __u8                    type;
-       __u8                    attributes;
-       __u8                    rsvd2[14];
-       __u64                   slba;
-       __u64                   nlb;
-       __u8                    guid[16];
-       __u8                    rsvd48[16];
-};
-
-enum {
-       NVME_LBART_TYPE_FS      = 0x01,
-       NVME_LBART_TYPE_RAID    = 0x02,
-       NVME_LBART_TYPE_CACHE   = 0x03,
-       NVME_LBART_TYPE_SWAP    = 0x04,
-
-       NVME_LBART_ATTRIB_TEMP  = 1 << 0,
-       NVME_LBART_ATTRIB_HIDE  = 1 << 1,
-};
-
-struct nvme_reservation_status {
-       __le32  gen;
-       __u8    rtype;
-       __u8    regctl[2];
-       __u8    resv5[2];
-       __u8    ptpls;
-       __u8    resv10[13];
-       struct {
-               __le16  cntlid;
-               __u8    rcsts;
-               __u8    resv3[5];
-               __le64  hostid;
-               __le64  rkey;
-       } regctl_ds[];
-};
-
-/* I/O commands */
-
-enum nvme_opcode {
-       nvme_cmd_flush          = 0x00,
-       nvme_cmd_write          = 0x01,
-       nvme_cmd_read           = 0x02,
-       nvme_cmd_write_uncor    = 0x04,
-       nvme_cmd_compare        = 0x05,
-       nvme_cmd_write_zeroes   = 0x08,
-       nvme_cmd_dsm            = 0x09,
-       nvme_cmd_resv_register  = 0x0d,
-       nvme_cmd_resv_report    = 0x0e,
-       nvme_cmd_resv_acquire   = 0x11,
-       nvme_cmd_resv_release   = 0x15,
-};
-
-struct nvme_common_command {
-       __u8                    opcode;
-       __u8                    flags;
-       __u16                   command_id;
-       __le32                  nsid;
-       __le32                  cdw2[2];
-       __le64                  metadata;
-       __le64                  prp1;
-       __le64                  prp2;
-       __le32                  cdw10[6];
-};
-
-struct nvme_rw_command {
-       __u8                    opcode;
-       __u8                    flags;
-       __u16                   command_id;
-       __le32                  nsid;
-       __u64                   rsvd2;
-       __le64                  metadata;
-       __le64                  prp1;
-       __le64                  prp2;
-       __le64                  slba;
-       __le16                  length;
-       __le16                  control;
-       __le32                  dsmgmt;
-       __le32                  reftag;
-       __le16                  apptag;
-       __le16                  appmask;
-};
-
-enum {
-       NVME_RW_LR                      = 1 << 15,
-       NVME_RW_FUA                     = 1 << 14,
-       NVME_RW_DSM_FREQ_UNSPEC         = 0,
-       NVME_RW_DSM_FREQ_TYPICAL        = 1,
-       NVME_RW_DSM_FREQ_RARE           = 2,
-       NVME_RW_DSM_FREQ_READS          = 3,
-       NVME_RW_DSM_FREQ_WRITES         = 4,
-       NVME_RW_DSM_FREQ_RW             = 5,
-       NVME_RW_DSM_FREQ_ONCE           = 6,
-       NVME_RW_DSM_FREQ_PREFETCH       = 7,
-       NVME_RW_DSM_FREQ_TEMP           = 8,
-       NVME_RW_DSM_LATENCY_NONE        = 0 << 4,
-       NVME_RW_DSM_LATENCY_IDLE        = 1 << 4,
-       NVME_RW_DSM_LATENCY_NORM        = 2 << 4,
-       NVME_RW_DSM_LATENCY_LOW         = 3 << 4,
-       NVME_RW_DSM_SEQ_REQ             = 1 << 6,
-       NVME_RW_DSM_COMPRESSED          = 1 << 7,
-       NVME_RW_PRINFO_PRCHK_REF        = 1 << 10,
-       NVME_RW_PRINFO_PRCHK_APP        = 1 << 11,
-       NVME_RW_PRINFO_PRCHK_GUARD      = 1 << 12,
-       NVME_RW_PRINFO_PRACT            = 1 << 13,
-};
-
-struct nvme_dsm_cmd {
-       __u8                    opcode;
-       __u8                    flags;
-       __u16                   command_id;
-       __le32                  nsid;
-       __u64                   rsvd2[2];
-       __le64                  prp1;
-       __le64                  prp2;
-       __le32                  nr;
-       __le32                  attributes;
-       __u32                   rsvd12[4];
-};
-
-enum {
-       NVME_DSMGMT_IDR         = 1 << 0,
-       NVME_DSMGMT_IDW         = 1 << 1,
-       NVME_DSMGMT_AD          = 1 << 2,
-};
-
-struct nvme_dsm_range {
-       __le32                  cattr;
-       __le32                  nlb;
-       __le64                  slba;
-};
-
-/* Admin commands */
-
-enum nvme_admin_opcode {
-       nvme_admin_delete_sq            = 0x00,
-       nvme_admin_create_sq            = 0x01,
-       nvme_admin_get_log_page         = 0x02,
-       nvme_admin_delete_cq            = 0x04,
-       nvme_admin_create_cq            = 0x05,
-       nvme_admin_identify             = 0x06,
-       nvme_admin_abort_cmd            = 0x08,
-       nvme_admin_set_features         = 0x09,
-       nvme_admin_get_features         = 0x0a,
-       nvme_admin_async_event          = 0x0c,
-       nvme_admin_activate_fw          = 0x10,
-       nvme_admin_download_fw          = 0x11,
-       nvme_admin_format_nvm           = 0x80,
-       nvme_admin_security_send        = 0x81,
-       nvme_admin_security_recv        = 0x82,
-};
-
-enum {
-       NVME_QUEUE_PHYS_CONTIG  = (1 << 0),
-       NVME_CQ_IRQ_ENABLED     = (1 << 1),
-       NVME_SQ_PRIO_URGENT     = (0 << 1),
-       NVME_SQ_PRIO_HIGH       = (1 << 1),
-       NVME_SQ_PRIO_MEDIUM     = (2 << 1),
-       NVME_SQ_PRIO_LOW        = (3 << 1),
-       NVME_FEAT_ARBITRATION   = 0x01,
-       NVME_FEAT_POWER_MGMT    = 0x02,
-       NVME_FEAT_LBA_RANGE     = 0x03,
-       NVME_FEAT_TEMP_THRESH   = 0x04,
-       NVME_FEAT_ERR_RECOVERY  = 0x05,
-       NVME_FEAT_VOLATILE_WC   = 0x06,
-       NVME_FEAT_NUM_QUEUES    = 0x07,
-       NVME_FEAT_IRQ_COALESCE  = 0x08,
-       NVME_FEAT_IRQ_CONFIG    = 0x09,
-       NVME_FEAT_WRITE_ATOMIC  = 0x0a,
-       NVME_FEAT_ASYNC_EVENT   = 0x0b,
-       NVME_FEAT_AUTO_PST      = 0x0c,
-       NVME_FEAT_SW_PROGRESS   = 0x80,
-       NVME_FEAT_HOST_ID       = 0x81,
-       NVME_FEAT_RESV_MASK     = 0x82,
-       NVME_FEAT_RESV_PERSIST  = 0x83,
-       NVME_LOG_ERROR          = 0x01,
-       NVME_LOG_SMART          = 0x02,
-       NVME_LOG_FW_SLOT        = 0x03,
-       NVME_LOG_RESERVATION    = 0x80,
-       NVME_FWACT_REPL         = (0 << 3),
-       NVME_FWACT_REPL_ACTV    = (1 << 3),
-       NVME_FWACT_ACTV         = (2 << 3),
-};
-
-struct nvme_identify {
-       __u8                    opcode;
-       __u8                    flags;
-       __u16                   command_id;
-       __le32                  nsid;
-       __u64                   rsvd2[2];
-       __le64                  prp1;
-       __le64                  prp2;
-       __le32                  cns;
-       __u32                   rsvd11[5];
-};
-
-struct nvme_features {
-       __u8                    opcode;
-       __u8                    flags;
-       __u16                   command_id;
-       __le32                  nsid;
-       __u64                   rsvd2[2];
-       __le64                  prp1;
-       __le64                  prp2;
-       __le32                  fid;
-       __le32                  dword11;
-       __u32                   rsvd12[4];
-};
-
-struct nvme_create_cq {
-       __u8                    opcode;
-       __u8                    flags;
-       __u16                   command_id;
-       __u32                   rsvd1[5];
-       __le64                  prp1;
-       __u64                   rsvd8;
-       __le16                  cqid;
-       __le16                  qsize;
-       __le16                  cq_flags;
-       __le16                  irq_vector;
-       __u32                   rsvd12[4];
-};
-
-struct nvme_create_sq {
-       __u8                    opcode;
-       __u8                    flags;
-       __u16                   command_id;
-       __u32                   rsvd1[5];
-       __le64                  prp1;
-       __u64                   rsvd8;
-       __le16                  sqid;
-       __le16                  qsize;
-       __le16                  sq_flags;
-       __le16                  cqid;
-       __u32                   rsvd12[4];
-};
-
-struct nvme_delete_queue {
-       __u8                    opcode;
-       __u8                    flags;
-       __u16                   command_id;
-       __u32                   rsvd1[9];
-       __le16                  qid;
-       __u16                   rsvd10;
-       __u32                   rsvd11[5];
-};
-
-struct nvme_abort_cmd {
-       __u8                    opcode;
-       __u8                    flags;
-       __u16                   command_id;
-       __u32                   rsvd1[9];
-       __le16                  sqid;
-       __u16                   cid;
-       __u32                   rsvd11[5];
-};
-
-struct nvme_download_firmware {
-       __u8                    opcode;
-       __u8                    flags;
-       __u16                   command_id;
-       __u32                   rsvd1[5];
-       __le64                  prp1;
-       __le64                  prp2;
-       __le32                  numd;
-       __le32                  offset;
-       __u32                   rsvd12[4];
-};
-
-struct nvme_format_cmd {
-       __u8                    opcode;
-       __u8                    flags;
-       __u16                   command_id;
-       __le32                  nsid;
-       __u64                   rsvd2[4];
-       __le32                  cdw10;
-       __u32                   rsvd11[5];
-};
-
-struct nvme_command {
-       union {
-               struct nvme_common_command common;
-               struct nvme_rw_command rw;
-               struct nvme_identify identify;
-               struct nvme_features features;
-               struct nvme_create_cq create_cq;
-               struct nvme_create_sq create_sq;
-               struct nvme_delete_queue delete_queue;
-               struct nvme_download_firmware dlfw;
-               struct nvme_format_cmd format;
-               struct nvme_dsm_cmd dsm;
-               struct nvme_abort_cmd abort;
-       };
-};
-
-enum {
-       NVME_SC_SUCCESS                 = 0x0,
-       NVME_SC_INVALID_OPCODE          = 0x1,
-       NVME_SC_INVALID_FIELD           = 0x2,
-       NVME_SC_CMDID_CONFLICT          = 0x3,
-       NVME_SC_DATA_XFER_ERROR         = 0x4,
-       NVME_SC_POWER_LOSS              = 0x5,
-       NVME_SC_INTERNAL                = 0x6,
-       NVME_SC_ABORT_REQ               = 0x7,
-       NVME_SC_ABORT_QUEUE             = 0x8,
-       NVME_SC_FUSED_FAIL              = 0x9,
-       NVME_SC_FUSED_MISSING           = 0xa,
-       NVME_SC_INVALID_NS              = 0xb,
-       NVME_SC_CMD_SEQ_ERROR           = 0xc,
-       NVME_SC_SGL_INVALID_LAST        = 0xd,
-       NVME_SC_SGL_INVALID_COUNT       = 0xe,
-       NVME_SC_SGL_INVALID_DATA        = 0xf,
-       NVME_SC_SGL_INVALID_METADATA    = 0x10,
-       NVME_SC_SGL_INVALID_TYPE        = 0x11,
-       NVME_SC_LBA_RANGE               = 0x80,
-       NVME_SC_CAP_EXCEEDED            = 0x81,
-       NVME_SC_NS_NOT_READY            = 0x82,
-       NVME_SC_RESERVATION_CONFLICT    = 0x83,
-       NVME_SC_CQ_INVALID              = 0x100,
-       NVME_SC_QID_INVALID             = 0x101,
-       NVME_SC_QUEUE_SIZE              = 0x102,
-       NVME_SC_ABORT_LIMIT             = 0x103,
-       NVME_SC_ABORT_MISSING           = 0x104,
-       NVME_SC_ASYNC_LIMIT             = 0x105,
-       NVME_SC_FIRMWARE_SLOT           = 0x106,
-       NVME_SC_FIRMWARE_IMAGE          = 0x107,
-       NVME_SC_INVALID_VECTOR          = 0x108,
-       NVME_SC_INVALID_LOG_PAGE        = 0x109,
-       NVME_SC_INVALID_FORMAT          = 0x10a,
-       NVME_SC_FIRMWARE_NEEDS_RESET    = 0x10b,
-       NVME_SC_INVALID_QUEUE           = 0x10c,
-       NVME_SC_FEATURE_NOT_SAVEABLE    = 0x10d,
-       NVME_SC_FEATURE_NOT_CHANGEABLE  = 0x10e,
-       NVME_SC_FEATURE_NOT_PER_NS      = 0x10f,
-       NVME_SC_FW_NEEDS_RESET_SUBSYS   = 0x110,
-       NVME_SC_BAD_ATTRIBUTES          = 0x180,
-       NVME_SC_INVALID_PI              = 0x181,
-       NVME_SC_READ_ONLY               = 0x182,
-       NVME_SC_WRITE_FAULT             = 0x280,
-       NVME_SC_READ_ERROR              = 0x281,
-       NVME_SC_GUARD_CHECK             = 0x282,
-       NVME_SC_APPTAG_CHECK            = 0x283,
-       NVME_SC_REFTAG_CHECK            = 0x284,
-       NVME_SC_COMPARE_FAILED          = 0x285,
-       NVME_SC_ACCESS_DENIED           = 0x286,
-       NVME_SC_DNR                     = 0x4000,
-};
-
-struct nvme_completion {
-       __le32  result;         /* Used by admin commands to return data */
-       __u32   rsvd;
-       __le16  sq_head;        /* how much of this queue may be reclaimed */
-       __le16  sq_id;          /* submission queue that generated this entry */
-       __u16   command_id;     /* of the command which completed */
-       __le16  status;         /* did the command fail, and if so, why? */
-};
-
-struct nvme_user_io {
-       __u8    opcode;
-       __u8    flags;
-       __u16   control;
-       __u16   nblocks;
-       __u16   rsvd;
-       __u64   metadata;
-       __u64   addr;
-       __u64   slba;
-       __u32   dsmgmt;
-       __u32   reftag;
-       __u16   apptag;
-       __u16   appmask;
-};
-
-struct nvme_passthru_cmd {
-       __u8    opcode;
-       __u8    flags;
-       __u16   rsvd1;
-       __u32   nsid;
-       __u32   cdw2;
-       __u32   cdw3;
-       __u64   metadata;
-       __u64   addr;
-       __u32   metadata_len;
-       __u32   data_len;
-       __u32   cdw10;
-       __u32   cdw11;
-       __u32   cdw12;
-       __u32   cdw13;
-       __u32   cdw14;
-       __u32   cdw15;
-       __u32   timeout_ms;
-       __u32   result;
-};
-
-#define NVME_VS(major, minor) (((major) << 16) | ((minor) << 8))
-
-#define nvme_admin_cmd nvme_passthru_cmd
-
-#define NVME_IOCTL_ID          _IO('N', 0x40)
-#define NVME_IOCTL_ADMIN_CMD   _IOWR('N', 0x41, struct nvme_admin_cmd)
-#define NVME_IOCTL_SUBMIT_IO   _IOW('N', 0x42, struct nvme_user_io)
-#define NVME_IOCTL_IO_CMD      _IOWR('N', 0x43, struct nvme_passthru_cmd)
-#define NVME_IOCTL_RESET       _IO('N', 0x44)
-#define NVME_IOCTL_SUBSYS_RESET        _IO('N', 0x45)
-
-#endif /* _UAPI_LINUX_NVME_H */
diff --git a/include/uapi/linux/nvme_ioctl.h b/include/uapi/linux/nvme_ioctl.h
new file mode 100644 (file)
index 0000000..c4b2a3f
--- /dev/null
@@ -0,0 +1,65 @@
+/*
+ * Definitions for the NVM Express ioctl interface
+ * Copyright (c) 2011-2014, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#ifndef _UAPI_LINUX_NVME_IOCTL_H
+#define _UAPI_LINUX_NVME_IOCTL_H
+
+#include <linux/types.h>
+
+struct nvme_user_io {
+       __u8    opcode;
+       __u8    flags;
+       __u16   control;
+       __u16   nblocks;
+       __u16   rsvd;
+       __u64   metadata;
+       __u64   addr;
+       __u64   slba;
+       __u32   dsmgmt;
+       __u32   reftag;
+       __u16   apptag;
+       __u16   appmask;
+};
+
+struct nvme_passthru_cmd {
+       __u8    opcode;
+       __u8    flags;
+       __u16   rsvd1;
+       __u32   nsid;
+       __u32   cdw2;
+       __u32   cdw3;
+       __u64   metadata;
+       __u64   addr;
+       __u32   metadata_len;
+       __u32   data_len;
+       __u32   cdw10;
+       __u32   cdw11;
+       __u32   cdw12;
+       __u32   cdw13;
+       __u32   cdw14;
+       __u32   cdw15;
+       __u32   timeout_ms;
+       __u32   result;
+};
+
+#define nvme_admin_cmd nvme_passthru_cmd
+
+#define NVME_IOCTL_ID          _IO('N', 0x40)
+#define NVME_IOCTL_ADMIN_CMD   _IOWR('N', 0x41, struct nvme_admin_cmd)
+#define NVME_IOCTL_SUBMIT_IO   _IOW('N', 0x42, struct nvme_user_io)
+#define NVME_IOCTL_IO_CMD      _IOWR('N', 0x43, struct nvme_passthru_cmd)
+#define NVME_IOCTL_RESET       _IO('N', 0x44)
+#define NVME_IOCTL_SUBSYS_RESET        _IO('N', 0x45)
+
+#endif /* _UAPI_LINUX_NVME_IOCTL_H */