wifi: rtw89: mac: define register address of rx_filter to generalize code
authorPing-Ke Shih <pkshih@realtek.com>
Tue, 22 Aug 2023 12:58:20 +0000 (20:58 +0800)
committerKalle Valo <kvalo@kernel.org>
Fri, 25 Aug 2023 09:59:53 +0000 (12:59 +0300)
rx_filter is used to decide which kind of packets are received to driver,
or just dropped by MAC layer to reduce bus traffic.

The bit definitions of old and new chips are the sames, but only address
is changed, so define a field to generalize usage.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230822125822.23817-5-pkshih@realtek.com
drivers/net/wireless/realtek/rtw89/core.c
drivers/net/wireless/realtek/rtw89/fw.c
drivers/net/wireless/realtek/rtw89/mac.c
drivers/net/wireless/realtek/rtw89/mac.h
drivers/net/wireless/realtek/rtw89/mac80211.c
drivers/net/wireless/realtek/rtw89/mac_be.c
drivers/net/wireless/realtek/rtw89/reg.h
drivers/net/wireless/realtek/rtw89/wow.c

index eca973b95fbb309545c5e370a6653e181d067e81..133bf289bacb4309b342ae693e8feee2aba9600e 100644 (file)
@@ -2477,6 +2477,7 @@ out:
 
 void rtw89_roc_start(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
 {
+       const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
        struct ieee80211_hw *hw = rtwdev->hw;
        struct rtw89_roc *roc = &rtwvif->roc;
        struct cfg80211_chan_def roc_chan;
@@ -2504,7 +2505,7 @@ void rtw89_roc_start(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
        rtw89_config_roc_chandef(rtwdev, rtwvif->sub_entity_idx, &roc_chan);
        rtw89_set_channel(rtwdev);
        rtw89_write32_clr(rtwdev,
-                         rtw89_mac_reg_by_idx(rtwdev, R_AX_RX_FLTR_OPT, RTW89_MAC_0),
+                         rtw89_mac_reg_by_idx(rtwdev, mac->rx_fltr, RTW89_MAC_0),
                          B_AX_A_UC_CAM_MATCH | B_AX_A_BC_CAM_MATCH);
 
        ieee80211_ready_on_channel(hw);
@@ -2512,6 +2513,7 @@ void rtw89_roc_start(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
 
 void rtw89_roc_end(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
 {
+       const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
        struct ieee80211_hw *hw = rtwdev->hw;
        struct rtw89_roc *roc = &rtwvif->roc;
        struct rtw89_vif *tmp;
@@ -2525,7 +2527,7 @@ void rtw89_roc_end(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
        rtw89_leave_lps(rtwdev);
 
        rtw89_write32_mask(rtwdev,
-                          rtw89_mac_reg_by_idx(rtwdev, R_AX_RX_FLTR_OPT, RTW89_MAC_0),
+                          rtw89_mac_reg_by_idx(rtwdev, mac->rx_fltr, RTW89_MAC_0),
                           B_AX_RX_FLTR_CFG_MASK,
                           rtwdev->hal.rx_fltr);
 
index ba873a5d1a8d525f747efa092f9f10c6983461d4..df1dc2f43c86bef572f0ac7291c1dfd8d05ff5a4 100644 (file)
@@ -3863,6 +3863,7 @@ void rtw89_hw_scan_start(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
                         struct ieee80211_scan_request *scan_req)
 {
        struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
+       const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
        struct cfg80211_scan_request *req = &scan_req->req;
        u32 rx_fltr = rtwdev->hal.rx_fltr;
        u8 mac_addr[ETH_ALEN];
@@ -3885,7 +3886,7 @@ void rtw89_hw_scan_start(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
        rx_fltr &= ~B_AX_A_BC;
        rx_fltr &= ~B_AX_A_A1_MATCH;
        rtw89_write32_mask(rtwdev,
-                          rtw89_mac_reg_by_idx(rtwdev, R_AX_RX_FLTR_OPT, RTW89_MAC_0),
+                          rtw89_mac_reg_by_idx(rtwdev, mac->rx_fltr, RTW89_MAC_0),
                           B_AX_RX_FLTR_CFG_MASK,
                           rx_fltr);
 }
@@ -3893,6 +3894,7 @@ void rtw89_hw_scan_start(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
 void rtw89_hw_scan_complete(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
                            bool aborted)
 {
+       const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
        struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info;
        struct cfg80211_scan_info info = {
                .aborted = aborted,
@@ -3903,7 +3905,7 @@ void rtw89_hw_scan_complete(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
                return;
 
        rtw89_write32_mask(rtwdev,
-                          rtw89_mac_reg_by_idx(rtwdev, R_AX_RX_FLTR_OPT, RTW89_MAC_0),
+                          rtw89_mac_reg_by_idx(rtwdev, mac->rx_fltr, RTW89_MAC_0),
                           B_AX_RX_FLTR_CFG_MASK,
                           rtwdev->hal.rx_fltr);
 
index e0925a21a09632aa4de493b60b3c5cd2b4668244..fab9f5004a75e3eff2b01813b602c9725a539a01 100644 (file)
@@ -5689,5 +5689,6 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_ax = {
        .filter_model_addr = R_AX_FILTER_MODEL_ADDR,
        .indir_access_addr = R_AX_INDIR_ACCESS_ENTRY,
        .mem_base_addrs = rtw89_mac_mem_base_addrs_ax,
+       .rx_fltr = R_AX_RX_FLTR_OPT,
 };
 EXPORT_SYMBOL(rtw89_mac_gen_ax);
index 7c794009348030d6356e7b08324d0ab319a5fe1f..7cf34137c0bcfc2513757997c162bdf97cd52e1e 100644 (file)
@@ -857,6 +857,7 @@ struct rtw89_mac_gen_def {
        u32 filter_model_addr;
        u32 indir_access_addr;
        const u32 *mem_base_addrs;
+       u32 rx_fltr;
 };
 
 extern const struct rtw89_mac_gen_def rtw89_mac_gen_ax;
index 1f4f126f46678fc23e2c6dddc4fd7ca2f7724c91..5e48618706d91113ed8a52486cb8de61c598e774 100644 (file)
@@ -224,6 +224,7 @@ static void rtw89_ops_configure_filter(struct ieee80211_hw *hw,
                                       u64 multicast)
 {
        struct rtw89_dev *rtwdev = hw->priv;
+       const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
 
        mutex_lock(&rtwdev->mutex);
        rtw89_leave_ps_mode(rtwdev);
@@ -271,13 +272,13 @@ static void rtw89_ops_configure_filter(struct ieee80211_hw *hw,
        }
 
        rtw89_write32_mask(rtwdev,
-                          rtw89_mac_reg_by_idx(rtwdev, R_AX_RX_FLTR_OPT, RTW89_MAC_0),
+                          rtw89_mac_reg_by_idx(rtwdev, mac->rx_fltr, RTW89_MAC_0),
                           B_AX_RX_FLTR_CFG_MASK,
                           rtwdev->hal.rx_fltr);
        if (!rtwdev->dbcc_en)
                goto out;
        rtw89_write32_mask(rtwdev,
-                          rtw89_mac_reg_by_idx(rtwdev, R_AX_RX_FLTR_OPT, RTW89_MAC_1),
+                          rtw89_mac_reg_by_idx(rtwdev, mac->rx_fltr, RTW89_MAC_1),
                           B_AX_RX_FLTR_CFG_MASK,
                           rtwdev->hal.rx_fltr);
 
index ec920978195e680018b5f9352826a9f5fcab61c0..9a63fb35e867f45cf5ae0c81e04144072e85afcd 100644 (file)
@@ -33,5 +33,6 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_be = {
        .filter_model_addr = R_BE_FILTER_MODEL_ADDR,
        .indir_access_addr = R_BE_INDIR_ACCESS_ENTRY,
        .mem_base_addrs = rtw89_mac_mem_base_addrs_be,
+       .rx_fltr = R_BE_RX_FLTR_OPT,
 };
 EXPORT_SYMBOL(rtw89_mac_gen_be);
index cab07cc993f00911d885147b55a7e55dacb3880c..eab26039242a0793c77c032766c60b58d7b21509 100644 (file)
 
 #define R_BE_FILTER_MODEL_ADDR 0x0C04
 
+#define R_BE_RX_FLTR_OPT 0x11420
+#define R_BE_RX_FLTR_OPT_C1 0x15420
+#define B_BE_UID_FILTER_MASK GENMASK(31, 24)
+#define B_BE_UNSPT_TYPE BIT(22)
+#define B_BE_RX_MPDU_MAX_LEN_MASK GENMASK(21, 16)
+#define B_BE_A_FTM_REQ BIT(14)
+#define B_BE_A_ERR_PKT BIT(13)
+#define B_BE_A_UNSUP_PKT BIT(12)
+#define B_BE_A_CRC32_ERR BIT(11)
+#define B_BE_A_BCN_CHK_RULE_MASK GENMASK(9, 8)
+#define B_BE_A_BCN_CHK_EN BIT(7)
+#define B_BE_A_MC_LIST_CAM_MATCH BIT(6)
+#define B_BE_A_BC_CAM_MATCH BIT(5)
+#define B_BE_A_UC_CAM_MATCH BIT(4)
+#define B_BE_A_MC BIT(3)
+#define B_BE_A_BC BIT(2)
+#define B_BE_A_A1_MATCH BIT(1)
+#define B_BE_SNIFFER_MODE BIT(0)
+
 #define RR_MOD 0x00
 #define RR_MOD_V1 0x10000
 #define RR_MOD_IQK GENMASK(19, 4)
index 364e546221500e2d526b7e6c4c319d1b4b9126e0..aa9efca0402539e0069b0862418725a5b33ac9db 100644 (file)
@@ -40,6 +40,7 @@ static void rtw89_wow_leave_lps(struct rtw89_dev *rtwdev)
 
 static int rtw89_wow_config_mac(struct rtw89_dev *rtwdev, bool enable_wow)
 {
+       const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
        int ret;
 
        if (enable_wow) {
@@ -49,7 +50,7 @@ static int rtw89_wow_config_mac(struct rtw89_dev *rtwdev, bool enable_wow)
                        return ret;
                }
                rtw89_write32_set(rtwdev, R_AX_RX_FUNCTION_STOP, B_AX_HDR_RX_STOP);
-               rtw89_write32_clr(rtwdev, R_AX_RX_FLTR_OPT, B_AX_SNIFFER_MODE);
+               rtw89_write32_clr(rtwdev, mac->rx_fltr, B_AX_SNIFFER_MODE);
                rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, false);
                rtw89_write32(rtwdev, R_AX_ACTION_FWD0, 0);
                rtw89_write32(rtwdev, R_AX_ACTION_FWD1, 0);