arm64: dts: rockchip: rk356x: Add VOP2 nodes

The VOP2 is the display output controller on the RK3568. Add the node
for it to the dtsi file along with the required display-subsystem node
and the iommu node.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220422072841.2206452-17-s.hauer@pengutronix.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3566.dtsi b/arch/arm64/boot/dts/rockchip/rk3566.dtsi
index 0b957068ff8991c6003da13fbd09bc63bb705e6f..6c4b17d27bdc526ffacc1d991a09f3982434e9f3 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3566.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3566.dtsi
@@ -29,3 +29,7 @@
        extcon = <&usb2phy0>;
        maximum-speed = "high-speed";
 };
+
+&vop {
+       compatible = "rockchip,rk3566-vop";
+};

diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
index 5eafddf62edc786d82697abc213d0943a67336e6..2bdf8c7e9765b54e8dd294696cc39d91bfd677f2 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -137,3 +137,7 @@
        phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>;
        phy-names = "usb2-phy", "usb3-phy";
 };
+
+&vop {
+       compatible = "rockchip,rk3568-vop";
+};

diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index f66db7d44060c4bb31d00798138bd82af7ed3418..fb946bde0ae5fabb8727540bf955140af6569abd 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -129,6 +129,11 @@
                };
        };
 
+       display_subsystem: display-subsystem {
+               compatible = "rockchip,display-subsystem";
+               ports = <&vop_out>;
+       };
+
        firmware {
                scmi: scmi {
                        compatible = "arm,scmi-smc";
@@ -632,6 +637,52 @@
                };
        };
 
+       vop: vop@fe040000 {
+               reg = <0x0 0xfe040000 0x0 0x3000>, <0x0 0xfe044000 0x0 0x1000>;
+               reg-names = "vop", "gamma-lut";
+               interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>, <&cru DCLK_VOP0>,
+                        <&cru DCLK_VOP1>, <&cru DCLK_VOP2>;
+               clock-names = "aclk", "hclk", "dclk_vp0", "dclk_vp1", "dclk_vp2";
+               iommus = <&vop_mmu>;
+               power-domains = <&power RK3568_PD_VO>;
+               rockchip,grf = <&grf>;
+               status = "disabled";
+
+               vop_out: ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       vp0: port@0 {
+                               reg = <0>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+
+                       vp1: port@1 {
+                               reg = <1>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+
+                       vp2: port@2 {
+                               reg = <2>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+               };
+       };
+
+       vop_mmu: iommu@fe043e00 {
+               compatible = "rockchip,rk3568-iommu";
+               reg = <0x0 0xfe043e00 0x0 0x100>, <0x0 0xfe043f00 0x0 0x100>;
+               interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
+               clock-names = "aclk", "iface";
+               #iommu-cells = <0>;
+               status = "disabled";
+       };
+
        qos_gpu: qos@fe128000 {
                compatible = "rockchip,rk3568-qos", "syscon";
                reg = <0x0 0xfe128000 0x0 0x20>;