usb: dwc3: exynos: add support for Google Tensor gs101
authorAndré Draszik <andre.draszik@linaro.org>
Tue, 23 Apr 2024 20:19:46 +0000 (21:19 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 30 Apr 2024 17:32:06 +0000 (19:32 +0200)
The Exynos-based Google Tensor gs101 SoC has a DWC3 compatible USB
controller and can reuse the existing Exynos glue. Add the
google,gs101-dwusb3 compatible and associated driver data. Four clocks
are required for USB for this SoC:
    * bus clock
    * suspend clock
    * Link interface AXI clock
    * Link interface APB clock

Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240423-usb-dwc3-gs101-v1-2-2f331f88203f@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/usb/dwc3/dwc3-exynos.c

index 3427522a7c6abec3aa20c84e52fdb2dddb7930c7..9a6e988d165a6776794547395e41577d91e76a41 100644 (file)
@@ -169,6 +169,12 @@ static const struct dwc3_exynos_driverdata exynos850_drvdata = {
        .suspend_clk_idx = -1,
 };
 
+static const struct dwc3_exynos_driverdata gs101_drvdata = {
+       .clk_names = { "bus_early", "susp_clk", "link_aclk", "link_pclk" },
+       .num_clks = 4,
+       .suspend_clk_idx = 1,
+};
+
 static const struct of_device_id exynos_dwc3_match[] = {
        {
                .compatible = "samsung,exynos5250-dwusb3",
@@ -182,6 +188,9 @@ static const struct of_device_id exynos_dwc3_match[] = {
        }, {
                .compatible = "samsung,exynos850-dwusb3",
                .data = &exynos850_drvdata,
+       }, {
+               .compatible = "google,gs101-dwusb3",
+               .data = &gs101_drvdata,
        }, {
        }
 };