drm/amd/display: dc cleanup for tests
authorSridevi Arvindekar <Sridevi.Arvindekar@amd.com>
Thu, 24 Aug 2023 23:20:30 +0000 (19:20 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 11 Sep 2023 21:17:37 +0000 (17:17 -0400)
[WHY&HOW]
Code cleanup found in internal tests

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Signed-off-by: Sridevi Arvindekar <Sridevi.Arvindekar@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c

index 5ac85df158b9f98c91fa2a42f19293837fc16b3b..37cab11d1b310fe86d68a7893ec694e2244aa82b 100644 (file)
@@ -2855,7 +2855,7 @@ void dcn20_fpga_init_hw(struct dc *dc)
        res_pool->mpc->funcs->mpc_init(res_pool->mpc);
 
        /* initialize OPP mpc_tree parameter */
-       for (i = 0; i < dc->res_pool->res_cap->num_opp; i++) {
+       for (i = 0; i < dc->res_pool->pipe_count; i++) {
                res_pool->opps[i]->mpc_tree_params.opp_id = res_pool->opps[i]->inst;
                res_pool->opps[i]->mpc_tree_params.opp_list = NULL;
                for (j = 0; j < MAX_PIPES; j++)