wifi: ath12k: add handler for WMI_VDEV_SET_TPC_POWER_CMDID
authorBaochen Qiang <quic_bqiang@quicinc.com>
Fri, 18 Apr 2025 02:55:47 +0000 (10:55 +0800)
committerJeff Johnson <jeff.johnson@oss.qualcomm.com>
Fri, 16 May 2025 19:38:54 +0000 (12:38 -0700)
Add the handler for WMI_VDEV_SET_TPC_POWER_CMDID, it is for 6 GHz band.
A subsequent patch will call this handler to send power parameters to
firmware.

Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3

Signed-off-by: Baochen Qiang <quic_bqiang@quicinc.com>
Reviewed-by: Vasanthakumar Thiagarajan <vasanthakumar.thiagarajan@oss.qualcomm.com>
Link: https://patch.msgid.link/20250418-ath12k-6g-lp-vlp-v1-14-c869c86cad60@quicinc.com
Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
drivers/net/wireless/ath/ath12k/wmi.c
drivers/net/wireless/ath/ath12k/wmi.h

index 6fa7cba35ab8f6d2420213c452a2722bed57b80a..7ad0934a344f2d1bd47775e4c6c0abc227a1ab33 100644 (file)
@@ -9826,3 +9826,63 @@ bool ath12k_wmi_supports_6ghz_cc_ext(struct ath12k *ar)
        return test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT,
                        ar->ab->wmi_ab.svc_map) && ar->supports_6ghz;
 }
+
+int ath12k_wmi_send_vdev_set_tpc_power(struct ath12k *ar,
+                                      u32 vdev_id,
+                                      struct ath12k_reg_tpc_power_info *param)
+{
+       struct wmi_vdev_set_tpc_power_cmd *cmd;
+       struct ath12k_wmi_pdev *wmi = ar->wmi;
+       struct wmi_vdev_ch_power_params *ch;
+       int i, ret, len, array_len;
+       struct sk_buff *skb;
+       struct wmi_tlv *tlv;
+       u8 *ptr;
+
+       array_len = sizeof(*ch) * param->num_pwr_levels;
+       len = sizeof(*cmd) + TLV_HDR_SIZE + array_len;
+
+       skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
+       if (!skb)
+               return -ENOMEM;
+
+       ptr = skb->data;
+
+       cmd = (struct wmi_vdev_set_tpc_power_cmd *)ptr;
+       cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_TPC_POWER_CMD,
+                                                sizeof(*cmd));
+       cmd->vdev_id = cpu_to_le32(vdev_id);
+       cmd->psd_power = cpu_to_le32(param->is_psd_power);
+       cmd->eirp_power = cpu_to_le32(param->eirp_power);
+       cmd->power_type_6ghz = cpu_to_le32(param->ap_power_type);
+
+       ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
+                  "tpc vdev id %d is psd power %d eirp power %d 6 ghz power type %d\n",
+                  vdev_id, param->is_psd_power, param->eirp_power, param->ap_power_type);
+
+       ptr += sizeof(*cmd);
+       tlv = (struct wmi_tlv *)ptr;
+       tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, array_len);
+
+       ptr += TLV_HDR_SIZE;
+       ch = (struct wmi_vdev_ch_power_params *)ptr;
+
+       for (i = 0; i < param->num_pwr_levels; i++, ch++) {
+               ch->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CH_POWER_INFO,
+                                                       sizeof(*ch));
+               ch->chan_cfreq = cpu_to_le32(param->chan_power_info[i].chan_cfreq);
+               ch->tx_power = cpu_to_le32(param->chan_power_info[i].tx_power);
+
+               ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "tpc chan freq %d TX power %d\n",
+                          ch->chan_cfreq, ch->tx_power);
+       }
+
+       ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_TPC_POWER_CMDID);
+       if (ret) {
+               ath12k_warn(ar->ab, "failed to send WMI_VDEV_SET_TPC_POWER_CMDID\n");
+               dev_kfree_skb(skb);
+               return ret;
+       }
+
+       return 0;
+}
index e4d383c090a60461b1af4529c6d5ef2fa4a2f2e9..9d4ea4f359a7b12f80701baf422183fae6a55efe 100644 (file)
@@ -26,6 +26,7 @@ struct ath12k_base;
 struct ath12k;
 struct ath12k_link_vif;
 struct ath12k_fw_stats;
+struct ath12k_reg_tpc_power_info;
 
 /* There is no signed version of __le32, so for a temporary solution come
  * up with our own version. The idea is from fs/ntfs/endian.h.
@@ -386,6 +387,22 @@ enum wmi_tlv_cmd_id {
        WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID,
        WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID,
        WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID,
+       WMI_VDEV_SET_ARP_STAT_CMDID,
+       WMI_VDEV_GET_ARP_STAT_CMDID,
+       WMI_VDEV_GET_TX_POWER_CMDID,
+       WMI_VDEV_LIMIT_OFFCHAN_CMDID,
+       WMI_VDEV_SET_CUSTOM_SW_RETRY_TH_CMDID,
+       WMI_VDEV_CHAINMASK_CONFIG_CMDID,
+       WMI_VDEV_GET_BCN_RECEPTION_STATS_CMDID,
+       WMI_VDEV_GET_MWS_COEX_INFO_CMDID,
+       WMI_VDEV_DELETE_ALL_PEER_CMDID,
+       WMI_VDEV_BSS_MAX_IDLE_TIME_CMDID,
+       WMI_VDEV_AUDIO_SYNC_TRIGGER_CMDID,
+       WMI_VDEV_AUDIO_SYNC_QTIMER_CMDID,
+       WMI_VDEV_SET_PCL_CMDID,
+       WMI_VDEV_GET_BIG_DATA_CMDID,
+       WMI_VDEV_GET_BIG_DATA_P2_CMDID,
+       WMI_VDEV_SET_TPC_POWER_CMDID,
        WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER),
        WMI_PEER_DELETE_CMDID,
        WMI_PEER_FLUSH_TIDS_CMDID,
@@ -1955,6 +1972,8 @@ enum wmi_tlv_tag {
        WMI_TAG_TPC_STATS_REG_PWR_ALLOWED,
        WMI_TAG_TPC_STATS_RATES_ARRAY,
        WMI_TAG_TPC_STATS_CTL_PWR_TABLE_EVENT,
+       WMI_TAG_VDEV_SET_TPC_POWER_CMD = 0x3B5,
+       WMI_TAG_VDEV_CH_POWER_INFO,
        WMI_TAG_EHT_RATE_SET = 0x3C4,
        WMI_TAG_DCS_AWGN_INT_TYPE = 0x3C5,
        WMI_TAG_MLO_TX_SEND_PARAMS,
@@ -5939,6 +5958,41 @@ struct wmi_tpc_stats_arg {
        struct wmi_tpc_ctl_pwr_table_arg ctl_array;
 };
 
+struct wmi_vdev_ch_power_params {
+       __le32 tlv_header;
+
+       /* Channel center frequency (MHz) */
+       __le32 chan_cfreq;
+
+       /* Unit: dBm, either PSD/EIRP power for this frequency or
+        * incremental for non-PSD BW
+        */
+       __le32 tx_power;
+} __packed;
+
+struct wmi_vdev_set_tpc_power_cmd {
+       __le32 tlv_header;
+       __le32 vdev_id;
+
+       /* Value: 0 or 1, is PSD power or not */
+       __le32 psd_power;
+
+        /* Maximum EIRP power (dBm units), valid only if power is PSD */
+       __le32 eirp_power;
+
+       /* Type: WMI_6GHZ_REG_TYPE, used for halphy CTL lookup */
+       __le32 power_type_6ghz;
+
+       /* This fixed_param TLV is followed by the below TLVs:
+        * num_pwr_levels of wmi_vdev_ch_power_info
+        * For PSD power, it is the PSD/EIRP power of the frequency (20 MHz chunks).
+        * For non-PSD power, the power values are for 20, 40, and till
+        * BSS BW power levels.
+        * The num_pwr_levels will be checked by sw how many elements present
+        * in the variable-length array.
+        */
+} __packed;
+
 void ath12k_wmi_init_qcn9274(struct ath12k_base *ab,
                             struct ath12k_wmi_resource_config_arg *config);
 void ath12k_wmi_init_wcn7850(struct ath12k_base *ab,
@@ -6134,5 +6188,8 @@ void ath12k_wmi_fw_stats_dump(struct ath12k *ar,
                              struct ath12k_fw_stats *fw_stats, u32 stats_id,
                              char *buf);
 bool ath12k_wmi_supports_6ghz_cc_ext(struct ath12k *ar);
+int ath12k_wmi_send_vdev_set_tpc_power(struct ath12k *ar,
+                                      u32 vdev_id,
+                                      struct ath12k_reg_tpc_power_info *param);
 
 #endif