drm/amd/display: Enable aux transfer path via dmub for dp tunneling
authorMeenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com>
Wed, 10 Jul 2024 16:58:20 +0000 (12:58 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 6 Aug 2024 14:34:34 +0000 (10:34 -0400)
[Why]
Aux transfer retries path does not support dp tunneling.

[How]
Based on ddc pin check, aux will be issued in legacy path or DMUB.

Signed-off-by: Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com>
Reviewed-by: Eric Yang <eric.yang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dce/dce_aux.c

index b8996d285f003add60a0667f21920a878f9aec2c..bb4ac5042c803a492e04d0d83f93dc8989aa3fa3 100644 (file)
@@ -735,7 +735,15 @@ bool dce_aux_transfer_with_retries(struct ddc_service *ddc,
                                        (unsigned int) payload->mot);
                if (payload->write)
                        dce_aux_log_payload("  write", payload->data, payload->length, 16);
-               ret = dce_aux_transfer_raw(ddc, payload, &operation_result);
+
+               /* Check whether aux to be processed via dmub or dcn directly */
+               if (ddc->ctx->dc->debug.enable_dmub_aux_for_legacy_ddc
+                       || ddc->ddc_pin == NULL) {
+                       ret = dce_aux_transfer_dmub_raw(ddc, payload, &operation_result);
+               } else {
+                       ret = dce_aux_transfer_raw(ddc, payload, &operation_result);
+               }
+
                DC_TRACE_LEVEL_MESSAGE(DAL_TRACE_LEVEL_INFORMATION,
                                        LOG_FLAG_I2cAux_DceAux,
                                        "dce_aux_transfer_with_retries: link_index=%u: END: retry %d of %d: address=0x%04x length=%u write=%d mot=%d: ret=%d operation_result=%d payload->reply=%u",