drm/i915: pass dev_priv explicitly to CURPOS
authorJani Nikula <jani.nikula@intel.com>
Wed, 15 May 2024 11:56:43 +0000 (14:56 +0300)
committerJani Nikula <jani.nikula@intel.com>
Thu, 16 May 2024 08:23:00 +0000 (11:23 +0300)
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CURPOS register macro.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ca229a123cb8a5d6a2970649a47236b3da1b02ad.1715774156.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/intel_cursor.c
drivers/gpu/drm/i915/display/intel_cursor_regs.h
drivers/gpu/drm/i915/gvt/fb_decoder.c
drivers/gpu/drm/i915/intel_gvt_mmio_table.c

index 573bbdec3e3d8c7469fcfdc90b487973a5b3aed5..17039d37dc91f14e8f9c7233bf5a4e41f30aa471 100644 (file)
@@ -298,14 +298,14 @@ static void i845_cursor_update_arm(struct intel_plane *plane,
                intel_de_write_fw(dev_priv, CURCNTR(dev_priv, PIPE_A), 0);
                intel_de_write_fw(dev_priv, CURBASE(dev_priv, PIPE_A), base);
                intel_de_write_fw(dev_priv, CURSIZE(PIPE_A), size);
-               intel_de_write_fw(dev_priv, CURPOS(PIPE_A), pos);
+               intel_de_write_fw(dev_priv, CURPOS(dev_priv, PIPE_A), pos);
                intel_de_write_fw(dev_priv, CURCNTR(dev_priv, PIPE_A), cntl);
 
                plane->cursor.base = base;
                plane->cursor.size = size;
                plane->cursor.cntl = cntl;
        } else {
-               intel_de_write_fw(dev_priv, CURPOS(PIPE_A), pos);
+               intel_de_write_fw(dev_priv, CURPOS(dev_priv, PIPE_A), pos);
        }
 }
 
@@ -647,14 +647,14 @@ static void i9xx_cursor_update_arm(struct intel_plane *plane,
                        intel_de_write_fw(dev_priv, CUR_FBC_CTL(pipe),
                                          fbc_ctl);
                intel_de_write_fw(dev_priv, CURCNTR(dev_priv, pipe), cntl);
-               intel_de_write_fw(dev_priv, CURPOS(pipe), pos);
+               intel_de_write_fw(dev_priv, CURPOS(dev_priv, pipe), pos);
                intel_de_write_fw(dev_priv, CURBASE(dev_priv, pipe), base);
 
                plane->cursor.base = base;
                plane->cursor.size = fbc_ctl;
                plane->cursor.cntl = cntl;
        } else {
-               intel_de_write_fw(dev_priv, CURPOS(pipe), pos);
+               intel_de_write_fw(dev_priv, CURPOS(dev_priv, pipe), pos);
                intel_de_write_fw(dev_priv, CURBASE(dev_priv, pipe), base);
        }
 }
index 4a7e27f0c3c1316fc4764a03f4e1badf0a8d90de..d0fa251ae8c4bf7659e1b83c5c6bc1ba77b439c3 100644 (file)
@@ -68,7 +68,7 @@
 
 #define CURCNTR(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURACNTR)
 #define CURBASE(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURABASE)
-#define CURPOS(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS)
+#define CURPOS(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS)
 #define CURPOS_ERLY_TPT(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS_ERLY_TPT)
 #define CURSIZE(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURASIZE)
 #define CUR_FBC_CTL(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CUR_FBC_CTL_A)
index 60f368affb6c88cec5ea5bc13bd05350210331ea..e78de423a6c70cabd9e0b92c7c557fd16e3fa74a 100644 (file)
@@ -384,7 +384,7 @@ int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu,
                return  -EINVAL;
        }
 
-       val = vgpu_vreg_t(vgpu, CURPOS(pipe));
+       val = vgpu_vreg_t(vgpu, CURPOS(dev_priv, pipe));
        plane->x_pos = (val & _CURSOR_POS_X_MASK) >> _CURSOR_POS_X_SHIFT;
        plane->x_sign = (val & _CURSOR_SIGN_X_MASK) >> _CURSOR_SIGN_X_SHIFT;
        plane->y_pos = (val & _CURSOR_POS_Y_MASK) >> _CURSOR_POS_Y_SHIFT;
index f562172995a6a9b9909c0ff6295710d58e1ccbbe..5ea1fbc2e9813bf72721aca206a1ccdf31ec7671 100644 (file)
@@ -148,9 +148,9 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter)
        MMIO_D(CURCNTR(dev_priv, PIPE_A));
        MMIO_D(CURCNTR(dev_priv, PIPE_B));
        MMIO_D(CURCNTR(dev_priv, PIPE_C));
-       MMIO_D(CURPOS(PIPE_A));
-       MMIO_D(CURPOS(PIPE_B));
-       MMIO_D(CURPOS(PIPE_C));
+       MMIO_D(CURPOS(dev_priv, PIPE_A));
+       MMIO_D(CURPOS(dev_priv, PIPE_B));
+       MMIO_D(CURPOS(dev_priv, PIPE_C));
        MMIO_D(CURBASE(dev_priv, PIPE_A));
        MMIO_D(CURBASE(dev_priv, PIPE_B));
        MMIO_D(CURBASE(dev_priv, PIPE_C));