drm/amd/display: disable clock gating logic reversed bug fix
authorMuhammad Ahmed <ahmed.ahmed@amd.com>
Fri, 28 Jul 2023 20:08:44 +0000 (16:08 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Aug 2023 22:08:27 +0000 (18:08 -0400)
[Why]
disable clock gating logic reversed bug fix

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Signed-off-by: Muhammad Ahmed <ahmed.ahmed@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubbub.c
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.c

index 7445ed27852a1f3e32ea968662a171f61ccc123b..1f4e0b6261adfc49b2e555155af306063913956a 100644 (file)
@@ -1018,8 +1018,8 @@ void hubbub31_init(struct hubbub *hubbub)
                /*done in hwseq*/
                /*REG_UPDATE(DCFCLK_CNTL, DCFCLK_GATE_DIS, 0);*/
                REG_UPDATE_2(DCHUBBUB_CLOCK_CNTL,
-                               DISPCLK_R_DCHUBBUB_GATE_DIS, 0,
-                               DCFCLK_R_DCHUBBUB_GATE_DIS, 0);
+                               DISPCLK_R_DCHUBBUB_GATE_DIS, 1,
+                               DCFCLK_R_DCHUBBUB_GATE_DIS, 1);
        }
 
        /*
index a18b9c0c5709ca3575e3f8a420b58a1e6adece8a..8bfef6d095b20136abb4b61d20077c21528c9141 100644 (file)
@@ -955,8 +955,8 @@ void hubbub32_init(struct hubbub *hubbub)
                /*REG_UPDATE(DCFCLK_CNTL, DCFCLK_GATE_DIS, 0);*/
 
                REG_UPDATE_2(DCHUBBUB_CLOCK_CNTL,
-                       DISPCLK_R_DCHUBBUB_GATE_DIS, 0,
-                       DCFCLK_R_DCHUBBUB_GATE_DIS, 0);
+                       DISPCLK_R_DCHUBBUB_GATE_DIS, 1,
+                       DCFCLK_R_DCHUBBUB_GATE_DIS, 1);
        }
        /*
        ignore the "df_pre_cstate_req" from the SDP port control.