drm/etnaviv: add TX perf domain

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_perfmon.c b/drivers/gpu/drm/etnaviv/etnaviv_perfmon.c
index aa7fe0b954a101b9d79b45f6bd2f03d89a7772c4..9efa933fc7b17512b00d9dbe293d669f90d60aa1 100644 (file)
--- a/drivers/gpu/drm/etnaviv/etnaviv_perfmon.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_perfmon.c
@@ -299,6 +299,59 @@ static const struct etnaviv_pm_domain doms_3d[] = {
                                &perf_reg_read
                        }
                }
+       },
+       {
+               .name = "TX",
+               .profile_read = VIVS_MC_PROFILE_TX_READ,
+               .profile_config = VIVS_MC_PROFILE_CONFIG1,
+               .nr_signals = 9,
+               .signal = (const struct etnaviv_pm_signal[]) {
+                       {
+                               "TOTAL_BILINEAR_REQUESTS",
+                               VIVS_MC_PROFILE_CONFIG1_TX_TOTAL_BILINEAR_REQUESTS,
+                               &perf_reg_read
+                       },
+                       {
+                               "TOTAL_TRILINEAR_REQUESTS",
+                               VIVS_MC_PROFILE_CONFIG1_TX_TOTAL_TRILINEAR_REQUESTS,
+                               &perf_reg_read
+                       },
+                       {
+                               "TOTAL_DISCARDED_TEXTURE_REQUESTS",
+                               VIVS_MC_PROFILE_CONFIG1_TX_TOTAL_DISCARDED_TEXTURE_REQUESTS,
+                               &perf_reg_read
+                       },
+                       {
+                               "TOTAL_TEXTURE_REQUESTS",
+                               VIVS_MC_PROFILE_CONFIG1_TX_TOTAL_TEXTURE_REQUESTS,
+                               &perf_reg_read
+                       },
+                       {
+                               "MEM_READ_COUNT",
+                               VIVS_MC_PROFILE_CONFIG1_TX_MEM_READ_COUNT,
+                               &perf_reg_read
+                       },
+                       {
+                               "MEM_READ_IN_8B_COUNT",
+                               VIVS_MC_PROFILE_CONFIG1_TX_MEM_READ_IN_8B_COUNT,
+                               &perf_reg_read
+                       },
+                       {
+                               "CACHE_MISS_COUNT",
+                               VIVS_MC_PROFILE_CONFIG1_TX_CACHE_MISS_COUNT,
+                               &perf_reg_read
+                       },
+                       {
+                               "CACHE_HIT_TEXEL_COUNT",
+                               VIVS_MC_PROFILE_CONFIG1_TX_CACHE_HIT_TEXEL_COUNT,
+                               &perf_reg_read
+                       },
+                       {
+                               "CACHE_MISS_TEXEL_COUNT",
+                               VIVS_MC_PROFILE_CONFIG1_TX_CACHE_MISS_TEXEL_COUNT,
+                               &perf_reg_read
+                       }
+               }
        }
 };