drm/amdgpu: add dynamic workload profile switching for gfx11

Enable dynamic workload profile switching for gfx11.

Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index 87ed78aa3703dbe52e2f3f29ea092e291b3ade7a..e27b5f8705c13586e52a58d0e145e1ce906194b0 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -1557,6 +1557,8 @@ static int gfx_v11_0_sw_init(struct amdgpu_ip_block *ip_block)
        int xcc_id = 0;
        struct amdgpu_device *adev = ip_block->adev;
 
+       INIT_DELAYED_WORK(&adev->gfx.idle_work, amdgpu_gfx_profile_idle_work_handler);
+
        switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
        case IP_VERSION(11, 0, 0):
        case IP_VERSION(11, 0, 2):
@@ -4741,6 +4743,8 @@ static int gfx_v11_0_hw_fini(struct amdgpu_ip_block *ip_block)
 {
        struct amdgpu_device *adev = ip_block->adev;
 
+       cancel_delayed_work_sync(&adev->gfx.idle_work);
+
        amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0);
        amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0);
        amdgpu_irq_put(adev, &adev->gfx.bad_op_irq, 0);
@@ -6836,6 +6840,20 @@ static void gfx_v11_0_ring_emit_cleaner_shader(struct amdgpu_ring *ring)
        amdgpu_ring_write(ring, 0);  /* RESERVED field, programmed to zero */
 }
 
+static void gfx_v11_0_ring_begin_use(struct amdgpu_ring *ring)
+{
+       amdgpu_gfx_profile_ring_begin_use(ring);
+
+       amdgpu_gfx_enforce_isolation_ring_begin_use(ring);
+}
+
+static void gfx_v11_0_ring_end_use(struct amdgpu_ring *ring)
+{
+       amdgpu_gfx_profile_ring_end_use(ring);
+
+       amdgpu_gfx_enforce_isolation_ring_end_use(ring);
+}
+
 static const struct amd_ip_funcs gfx_v11_0_ip_funcs = {
        .name = "gfx_v11_0",
        .early_init = gfx_v11_0_early_init,
@@ -6910,8 +6928,8 @@ static const struct amdgpu_ring_funcs gfx_v11_0_ring_funcs_gfx = {
        .emit_mem_sync = gfx_v11_0_emit_mem_sync,
        .reset = gfx_v11_0_reset_kgq,
        .emit_cleaner_shader = gfx_v11_0_ring_emit_cleaner_shader,
-       .begin_use = amdgpu_gfx_enforce_isolation_ring_begin_use,
-       .end_use = amdgpu_gfx_enforce_isolation_ring_end_use,
+       .begin_use = gfx_v11_0_ring_begin_use,
+       .end_use = gfx_v11_0_ring_end_use,
 };
 
 static const struct amdgpu_ring_funcs gfx_v11_0_ring_funcs_compute = {
@@ -6952,8 +6970,8 @@ static const struct amdgpu_ring_funcs gfx_v11_0_ring_funcs_compute = {
        .emit_mem_sync = gfx_v11_0_emit_mem_sync,
        .reset = gfx_v11_0_reset_kcq,
        .emit_cleaner_shader = gfx_v11_0_ring_emit_cleaner_shader,
-       .begin_use = amdgpu_gfx_enforce_isolation_ring_begin_use,
-       .end_use = amdgpu_gfx_enforce_isolation_ring_end_use,
+       .begin_use = gfx_v11_0_ring_begin_use,
+       .end_use = gfx_v11_0_ring_end_use,
 };
 
 static const struct amdgpu_ring_funcs gfx_v11_0_ring_funcs_kiq = {