drm/nouveau/mspdec: switch to instanced constructor
authorBen Skeggs <bskeggs@redhat.com>
Wed, 3 Feb 2021 22:38:32 +0000 (08:38 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Thu, 11 Feb 2021 01:49:58 +0000 (11:49 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
15 files changed:
drivers/gpu/drm/nouveau/include/nvkm/core/device.h
drivers/gpu/drm/nouveau/include/nvkm/core/layout.h
drivers/gpu/drm/nouveau/include/nvkm/engine/mspdec.h
drivers/gpu/drm/nouveau/nvkm/core/subdev.c
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
drivers/gpu/drm/nouveau/nvkm/engine/mspdec/base.c
drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c
drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c
drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c
drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gt215.c
drivers/gpu/drm/nouveau/nvkm/engine/mspdec/priv.h
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g98.c
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/mcp89.c

index 6530b4f5b1475043ec750b204b5a82bd2993e55e..e8200e2a29d17dd678bbbe0189e37df263b93446 100644 (file)
@@ -60,7 +60,6 @@ struct nvkm_device {
                struct notifier_block nb;
        } acpi;
 
-       struct nvkm_engine *mspdec;
        struct nvkm_engine *msppp;
        struct nvkm_engine *msvld;
        struct nvkm_nvenc *nvenc[3];
@@ -111,7 +110,6 @@ struct nvkm_device_chip {
 #undef NVKM_LAYOUT_INST
 #undef NVKM_LAYOUT_ONCE
 
-       int (*mspdec  )(struct nvkm_device *, int idx, struct nvkm_engine **);
        int (*msppp   )(struct nvkm_device *, int idx, struct nvkm_engine **);
        int (*msvld   )(struct nvkm_device *, int idx, struct nvkm_engine **);
        int (*nvenc[3])(struct nvkm_device *, int idx, struct nvkm_nvenc **);
index d1ed1cf864f5aa0233280dc249a3c973c4db7d10..cce050b2de56ae8b4c63324e101e3b5573b105c1 100644 (file)
@@ -36,4 +36,5 @@ NVKM_LAYOUT_ONCE(NVKM_ENGINE_IFB     , struct nvkm_engine  ,      ifb)
 NVKM_LAYOUT_ONCE(NVKM_ENGINE_ME      , struct nvkm_engine  ,       me)
 NVKM_LAYOUT_ONCE(NVKM_ENGINE_MPEG    , struct nvkm_engine  ,     mpeg)
 NVKM_LAYOUT_ONCE(NVKM_ENGINE_MSENC   , struct nvkm_engine  ,    msenc)
+NVKM_LAYOUT_ONCE(NVKM_ENGINE_MSPDEC  , struct nvkm_engine  ,   mspdec)
 NVKM_LAYOUT_ONCE(NVKM_ENGINE_VP      , struct nvkm_engine  ,       vp)
index 83bb2fcb2cbf5831a04a71d4a10661e922d290c0..ac8f08ce183ce3782c28d3fef6811c6f9f2bc530 100644 (file)
@@ -2,8 +2,8 @@
 #ifndef __NVKM_MSPDEC_H__
 #define __NVKM_MSPDEC_H__
 #include <engine/falcon.h>
-int g98_mspdec_new(struct nvkm_device *, int, struct nvkm_engine **);
-int gt215_mspdec_new(struct nvkm_device *, int, struct nvkm_engine **);
-int gf100_mspdec_new(struct nvkm_device *, int, struct nvkm_engine **);
-int gk104_mspdec_new(struct nvkm_device *, int, struct nvkm_engine **);
+int g98_mspdec_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_engine **);
+int gt215_mspdec_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_engine **);
+int gf100_mspdec_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_engine **);
+int gk104_mspdec_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_engine **);
 #endif
index bfd366ba469b86b01f96243ccf5059423aff710d..09015ff40e3ae7f1bd958f945f80e263fb55f81d 100644 (file)
@@ -33,7 +33,6 @@ nvkm_subdev_type[NVKM_SUBDEV_NR] = {
 #include <core/layout.h>
 #undef NVKM_LAYOUT_ONCE
 #undef NVKM_LAYOUT_INST
-       [NVKM_ENGINE_MSPDEC  ] = "mspdec",
        [NVKM_ENGINE_MSPPP   ] = "msppp",
        [NVKM_ENGINE_MSVLD   ] = "msvld",
        [NVKM_ENGINE_NVENC0  ] = "nvenc0",
index e256869dbb890ff6b336c1ac73abe613d05f8202..49d554e359279d1f726c7dce96696049ef652d28 100644 (file)
@@ -1098,7 +1098,7 @@ nv98_chipset = {
        .dma      = { 0x00000001, nv50_dma_new },
        .fifo     = { 0x00000001, g84_fifo_new },
        .gr       = { 0x00000001, g84_gr_new },
-       .mspdec = g98_mspdec_new,
+       .mspdec   = { 0x00000001, g98_mspdec_new },
        .msppp = g98_msppp_new,
        .msvld = g98_msvld_new,
        .pm = g84_pm_new,
@@ -1165,7 +1165,7 @@ nva3_chipset = {
        .fifo     = { 0x00000001, g84_fifo_new },
        .gr       = { 0x00000001, gt215_gr_new },
        .mpeg     = { 0x00000001, g84_mpeg_new },
-       .mspdec = gt215_mspdec_new,
+       .mspdec   = { 0x00000001, gt215_mspdec_new },
        .msppp = gt215_msppp_new,
        .msvld = gt215_msvld_new,
        .pm = gt215_pm_new,
@@ -1198,7 +1198,7 @@ nva5_chipset = {
        .dma      = { 0x00000001, nv50_dma_new },
        .fifo     = { 0x00000001, g84_fifo_new },
        .gr       = { 0x00000001, gt215_gr_new },
-       .mspdec = gt215_mspdec_new,
+       .mspdec   = { 0x00000001, gt215_mspdec_new },
        .msppp = gt215_msppp_new,
        .msvld = gt215_msvld_new,
        .pm = gt215_pm_new,
@@ -1231,7 +1231,7 @@ nva8_chipset = {
        .dma      = { 0x00000001, nv50_dma_new },
        .fifo     = { 0x00000001, g84_fifo_new },
        .gr       = { 0x00000001, gt215_gr_new },
-       .mspdec = gt215_mspdec_new,
+       .mspdec   = { 0x00000001, gt215_mspdec_new },
        .msppp = gt215_msppp_new,
        .msvld = gt215_msvld_new,
        .pm = gt215_pm_new,
@@ -1262,7 +1262,7 @@ nvaa_chipset = {
        .dma      = { 0x00000001, nv50_dma_new },
        .fifo     = { 0x00000001, g84_fifo_new },
        .gr       = { 0x00000001, gt200_gr_new },
-       .mspdec = g98_mspdec_new,
+       .mspdec   = { 0x00000001, g98_mspdec_new },
        .msppp = g98_msppp_new,
        .msvld = g98_msvld_new,
        .pm = g84_pm_new,
@@ -1294,7 +1294,7 @@ nvac_chipset = {
        .dma      = { 0x00000001, nv50_dma_new },
        .fifo     = { 0x00000001, g84_fifo_new },
        .gr       = { 0x00000001, mcp79_gr_new },
-       .mspdec = g98_mspdec_new,
+       .mspdec   = { 0x00000001, g98_mspdec_new },
        .msppp = g98_msppp_new,
        .msvld = g98_msvld_new,
        .pm = g84_pm_new,
@@ -1328,7 +1328,7 @@ nvaf_chipset = {
        .dma      = { 0x00000001, nv50_dma_new },
        .fifo     = { 0x00000001, g84_fifo_new },
        .gr       = { 0x00000001, mcp89_gr_new },
-       .mspdec = gt215_mspdec_new,
+       .mspdec   = { 0x00000001, gt215_mspdec_new },
        .msppp = gt215_msppp_new,
        .msvld = mcp89_msvld_new,
        .pm = gt215_pm_new,
@@ -1364,7 +1364,7 @@ nvc0_chipset = {
        .dma      = { 0x00000001, gf100_dma_new },
        .fifo     = { 0x00000001, gf100_fifo_new },
        .gr       = { 0x00000001, gf100_gr_new },
-       .mspdec = gf100_mspdec_new,
+       .mspdec   = { 0x00000001, gf100_mspdec_new },
        .msppp = gf100_msppp_new,
        .msvld = gf100_msvld_new,
        .pm = gf100_pm_new,
@@ -1400,7 +1400,7 @@ nvc1_chipset = {
        .dma      = { 0x00000001, gf100_dma_new },
        .fifo     = { 0x00000001, gf100_fifo_new },
        .gr       = { 0x00000001, gf108_gr_new },
-       .mspdec = gf100_mspdec_new,
+       .mspdec   = { 0x00000001, gf100_mspdec_new },
        .msppp = gf100_msppp_new,
        .msvld = gf100_msvld_new,
        .pm = gf108_pm_new,
@@ -1436,7 +1436,7 @@ nvc3_chipset = {
        .dma      = { 0x00000001, gf100_dma_new },
        .fifo     = { 0x00000001, gf100_fifo_new },
        .gr       = { 0x00000001, gf104_gr_new },
-       .mspdec = gf100_mspdec_new,
+       .mspdec   = { 0x00000001, gf100_mspdec_new },
        .msppp = gf100_msppp_new,
        .msvld = gf100_msvld_new,
        .pm = gf100_pm_new,
@@ -1472,7 +1472,7 @@ nvc4_chipset = {
        .dma      = { 0x00000001, gf100_dma_new },
        .fifo     = { 0x00000001, gf100_fifo_new },
        .gr       = { 0x00000001, gf104_gr_new },
-       .mspdec = gf100_mspdec_new,
+       .mspdec   = { 0x00000001, gf100_mspdec_new },
        .msppp = gf100_msppp_new,
        .msvld = gf100_msvld_new,
        .pm = gf100_pm_new,
@@ -1508,7 +1508,7 @@ nvc8_chipset = {
        .dma      = { 0x00000001, gf100_dma_new },
        .fifo     = { 0x00000001, gf100_fifo_new },
        .gr       = { 0x00000001, gf110_gr_new },
-       .mspdec = gf100_mspdec_new,
+       .mspdec   = { 0x00000001, gf100_mspdec_new },
        .msppp = gf100_msppp_new,
        .msvld = gf100_msvld_new,
        .pm = gf100_pm_new,
@@ -1544,7 +1544,7 @@ nvce_chipset = {
        .dma      = { 0x00000001, gf100_dma_new },
        .fifo     = { 0x00000001, gf100_fifo_new },
        .gr       = { 0x00000001, gf104_gr_new },
-       .mspdec = gf100_mspdec_new,
+       .mspdec   = { 0x00000001, gf100_mspdec_new },
        .msppp = gf100_msppp_new,
        .msvld = gf100_msvld_new,
        .pm = gf100_pm_new,
@@ -1580,7 +1580,7 @@ nvcf_chipset = {
        .dma      = { 0x00000001, gf100_dma_new },
        .fifo     = { 0x00000001, gf100_fifo_new },
        .gr       = { 0x00000001, gf104_gr_new },
-       .mspdec = gf100_mspdec_new,
+       .mspdec   = { 0x00000001, gf100_mspdec_new },
        .msppp = gf100_msppp_new,
        .msvld = gf100_msvld_new,
        .pm = gf100_pm_new,
@@ -1615,7 +1615,7 @@ nvd7_chipset = {
        .dma      = { 0x00000001, gf119_dma_new },
        .fifo     = { 0x00000001, gf100_fifo_new },
        .gr       = { 0x00000001, gf117_gr_new },
-       .mspdec = gf100_mspdec_new,
+       .mspdec   = { 0x00000001, gf100_mspdec_new },
        .msppp = gf100_msppp_new,
        .msvld = gf100_msvld_new,
        .pm = gf117_pm_new,
@@ -1651,7 +1651,7 @@ nvd9_chipset = {
        .dma      = { 0x00000001, gf119_dma_new },
        .fifo     = { 0x00000001, gf100_fifo_new },
        .gr       = { 0x00000001, gf119_gr_new },
-       .mspdec = gf100_mspdec_new,
+       .mspdec   = { 0x00000001, gf100_mspdec_new },
        .msppp = gf100_msppp_new,
        .msvld = gf100_msvld_new,
        .pm = gf117_pm_new,
@@ -1688,7 +1688,7 @@ nve4_chipset = {
        .dma      = { 0x00000001, gf119_dma_new },
        .fifo     = { 0x00000001, gk104_fifo_new },
        .gr       = { 0x00000001, gk104_gr_new },
-       .mspdec = gk104_mspdec_new,
+       .mspdec   = { 0x00000001, gk104_mspdec_new },
        .msppp = gf100_msppp_new,
        .msvld = gk104_msvld_new,
        .pm = gk104_pm_new,
@@ -1725,7 +1725,7 @@ nve6_chipset = {
        .dma      = { 0x00000001, gf119_dma_new },
        .fifo     = { 0x00000001, gk104_fifo_new },
        .gr       = { 0x00000001, gk104_gr_new },
-       .mspdec = gk104_mspdec_new,
+       .mspdec   = { 0x00000001, gk104_mspdec_new },
        .msppp = gf100_msppp_new,
        .msvld = gk104_msvld_new,
        .pm = gk104_pm_new,
@@ -1762,7 +1762,7 @@ nve7_chipset = {
        .dma      = { 0x00000001, gf119_dma_new },
        .fifo     = { 0x00000001, gk104_fifo_new },
        .gr       = { 0x00000001, gk104_gr_new },
-       .mspdec = gk104_mspdec_new,
+       .mspdec   = { 0x00000001, gk104_mspdec_new },
        .msppp = gf100_msppp_new,
        .msvld = gk104_msvld_new,
        .pm = gk104_pm_new,
@@ -1824,7 +1824,7 @@ nvf0_chipset = {
        .dma      = { 0x00000001, gf119_dma_new },
        .fifo     = { 0x00000001, gk110_fifo_new },
        .gr       = { 0x00000001, gk110_gr_new },
-       .mspdec = gk104_mspdec_new,
+       .mspdec   = { 0x00000001, gk104_mspdec_new },
        .msppp = gf100_msppp_new,
        .msvld = gk104_msvld_new,
        .sw = gf100_sw_new,
@@ -1860,7 +1860,7 @@ nvf1_chipset = {
        .dma      = { 0x00000001, gf119_dma_new },
        .fifo     = { 0x00000001, gk110_fifo_new },
        .gr       = { 0x00000001, gk110b_gr_new },
-       .mspdec = gk104_mspdec_new,
+       .mspdec   = { 0x00000001, gk104_mspdec_new },
        .msppp = gf100_msppp_new,
        .msvld = gk104_msvld_new,
        .sw = gf100_sw_new,
@@ -1896,7 +1896,7 @@ nv106_chipset = {
        .dma      = { 0x00000001, gf119_dma_new },
        .fifo     = { 0x00000001, gk208_fifo_new },
        .gr       = { 0x00000001, gk208_gr_new },
-       .mspdec = gk104_mspdec_new,
+       .mspdec   = { 0x00000001, gk104_mspdec_new },
        .msppp = gf100_msppp_new,
        .msvld = gk104_msvld_new,
        .sw = gf100_sw_new,
@@ -1932,7 +1932,7 @@ nv108_chipset = {
        .dma      = { 0x00000001, gf119_dma_new },
        .fifo     = { 0x00000001, gk208_fifo_new },
        .gr       = { 0x00000001, gk208_gr_new },
-       .mspdec = gk104_mspdec_new,
+       .mspdec   = { 0x00000001, gk104_mspdec_new },
        .msppp = gf100_msppp_new,
        .msvld = gk104_msvld_new,
        .sw = gf100_sw_new,
@@ -3174,7 +3174,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
 #include <core/layout.h>
 #undef NVKM_LAYOUT_INST
 #undef NVKM_LAYOUT_ONCE
-               _(NVKM_ENGINE_MSPDEC  ,   mspdec);
                _(NVKM_ENGINE_MSPPP   ,    msppp);
                _(NVKM_ENGINE_MSVLD   ,    msvld);
                _(NVKM_ENGINE_NVENC0  , nvenc[0]);
index 80211f76093bdca030c29a0d044b71adc2402ca2..842fcfbd28b83815ad3984f3db75cafe11c6949d 100644 (file)
@@ -24,9 +24,8 @@
 #include "priv.h"
 
 int
-nvkm_mspdec_new_(const struct nvkm_falcon_func *func,
-                struct nvkm_device *device, int index,
-                struct nvkm_engine **pengine)
+nvkm_mspdec_new_(const struct nvkm_falcon_func *func, struct nvkm_device *device,
+                enum nvkm_subdev_type type, int inst, struct nvkm_engine **pengine)
 {
-       return nvkm_falcon_new_(func, device, index, true, 0x085000, pengine);
+       return nvkm_falcon_new_(func, device, type, inst, true, 0x085000, pengine);
 }
index f30cf1dcfb30b999bac4f9f5a864465046de167a..ecb06d68f544fa191dd635b041fe42a9a439a81d 100644 (file)
@@ -43,8 +43,8 @@ g98_mspdec = {
 };
 
 int
-g98_mspdec_new(struct nvkm_device *device, int index,
-            struct nvkm_engine **pengine)
+g98_mspdec_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_engine **pengine)
 {
-       return nvkm_mspdec_new_(&g98_mspdec, device, index, pengine);
+       return nvkm_mspdec_new_(&g98_mspdec, device, type, inst, pengine);
 }
index cfe1aa81bd144f503d0ca318e9c5d2279f8ef0f8..0a69bd767d698ef724701c8711cfae495dc66ead 100644 (file)
@@ -43,8 +43,8 @@ gf100_mspdec = {
 };
 
 int
-gf100_mspdec_new(struct nvkm_device *device, int index,
+gf100_mspdec_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
                 struct nvkm_engine **pengine)
 {
-       return nvkm_mspdec_new_(&gf100_mspdec, device, index, pengine);
+       return nvkm_mspdec_new_(&gf100_mspdec, device, type, inst, pengine);
 }
index 24272b4927bcdf41a46a146a2e1f07bd316668e1..a08991dca4281cc67970ee0c255b8e67fe9b3111 100644 (file)
@@ -35,8 +35,8 @@ gk104_mspdec = {
 };
 
 int
-gk104_mspdec_new(struct nvkm_device *device, int index,
+gk104_mspdec_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
                 struct nvkm_engine **pengine)
 {
-       return nvkm_mspdec_new_(&gk104_mspdec, device, index, pengine);
+       return nvkm_mspdec_new_(&gk104_mspdec, device, type, inst, pengine);
 }
index cf6e59ad6ee296dfab8de7a3e19ab3e3e3db6893..791fb03a32ad3a6488380e5287ddb346c229f128 100644 (file)
@@ -35,8 +35,8 @@ gt215_mspdec = {
 };
 
 int
-gt215_mspdec_new(struct nvkm_device *device, int index,
-            struct nvkm_engine **pengine)
+gt215_mspdec_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+                struct nvkm_engine **pengine)
 {
-       return nvkm_mspdec_new_(&gt215_mspdec, device, index, pengine);
+       return nvkm_mspdec_new_(&gt215_mspdec, device, type, inst, pengine);
 }
index 86445a2600d0edc93f64aaa08c29189421ff8a69..2bc5537d40a3e777bfa19d1e0d029c732fc19052 100644 (file)
@@ -3,8 +3,8 @@
 #define __NVKM_MSPDEC_PRIV_H__
 #include <engine/mspdec.h>
 
-int nvkm_mspdec_new_(const struct nvkm_falcon_func *, struct nvkm_device *,
-                    int index, struct nvkm_engine **);
+int nvkm_mspdec_new_(const struct nvkm_falcon_func *, struct nvkm_device *, enum nvkm_subdev_type,
+                    int, struct nvkm_engine **);
 
 void g98_mspdec_init(struct nvkm_falcon *);
 
index 710eead0ce636ca55ef6742820ee1744eff53170..81a85f5024958a0efaa5b353a3910769b9cb8d93 100644 (file)
@@ -35,7 +35,7 @@ g98_devinit_disable(struct nvkm_devinit *init)
        u64 disable = 0ULL;
 
        if (!(r001540 & 0x40000000)) {
-               disable |= (1ULL << NVKM_ENGINE_MSPDEC);
+               nvkm_subdev_disable(device, NVKM_ENGINE_MSPDEC, 0);
                disable |= (1ULL << NVKM_ENGINE_MSVLD);
                disable |= (1ULL << NVKM_ENGINE_MSPPP);
        }
index 275616f192e26e4a268a1c40bbfd965adbab5ff9..61b0d1b5e96f5a915feaaa0f8f1a4249642f07ff 100644 (file)
@@ -74,7 +74,7 @@ gf100_devinit_disable(struct nvkm_devinit *init)
                nvkm_subdev_disable(device, NVKM_ENGINE_DISP, 0);
 
        if (r022500 & 0x00000002) {
-               disable |= (1ULL << NVKM_ENGINE_MSPDEC);
+               nvkm_subdev_disable(device, NVKM_ENGINE_MSPDEC, 0);
                disable |= (1ULL << NVKM_ENGINE_MSPPP);
        }
 
index ecaa6f8f7c5b750eb7c8bc6ac4cf44dae89f4d19..2cd999060a612acded49ae98a04d4ade5b2e6457 100644 (file)
@@ -71,7 +71,7 @@ gt215_devinit_disable(struct nvkm_devinit *init)
        u64 disable = 0ULL;
 
        if (!(r001540 & 0x40000000)) {
-               disable |= (1ULL << NVKM_ENGINE_MSPDEC);
+               nvkm_subdev_disable(device, NVKM_ENGINE_MSPDEC, 0);
                disable |= (1ULL << NVKM_ENGINE_MSPPP);
        }
 
index 6f4a49ae75483f2c720abf770e01c33bfb12eccc..cb14ab804c9793fc60717fae873f156b736c4959 100644 (file)
@@ -35,7 +35,7 @@ mcp89_devinit_disable(struct nvkm_devinit *init)
        u64 disable = 0;
 
        if (!(r001540 & 0x40000000)) {
-               disable |= (1ULL << NVKM_ENGINE_MSPDEC);
+               nvkm_subdev_disable(device, NVKM_ENGINE_MSPDEC, 0);
                disable |= (1ULL << NVKM_ENGINE_MSPPP);
        }